Jules Richardson wrote:
It might take
a while to process the data, though.
I really don't know - maybe some of the resident Catweasel experts can
comment there. I suppose to 'understand' an image we wouldn't be doing
anything in software that the drive controller doesn't normally do in
hardware.
I suppose ultimately it's going to depend on the speed of the machine that's
analysing the data, and the efficiency of the algorithm...
To be honest, the quicker the better - but I
wouldn't be upset if it
took an hour or two to grab a drive image. Some of the dumps I have were
transferred at 9600 baud serial...
3600RPM = 60 revolutions per second.
1 revolution = 16.667 milliseconds
306 data tracks * 4 heads = 1224 tracks total (ST412)
1224 tracks * 16.667ms = 20 seconds, excluding transfer time
If we assume T_transfer = 100ms/track (to be pessimistic)...
100ms * 1224 tracks = 122.4 seconds = ~2 minutes
Assuming no read retries, and a head switching time of zero (and an infinitely
fast hard drive to store the image on), that's a theoretical minimum of 142.4
seconds.
I wouldn't expect it to be that fast, but ~15 minutes is probably a reasonable
estimate.
Can you read from the buffer and transfer to the PC at
the same time as
you're populating the buffer by reading from the drive?
No, it's a single-ported RAM. Either the MCU can control it, or the FPGA can.
One option would be to add a second SRAM chip, which could be rigged as a
ping-pong buffer (while track N is being downloaded, track N+1 is being read).
Or is what you
have essentially a single microcontroller?
No, it's a PIC18F4550 "USB-Enabled 8-bit Microcontroller" bolted onto an
Altera Cyclone II 2C20 FPGA.
The FPGA handles everything on the disc interface side -- reading and writing
data, setting/querying control lines and so forth.
The PIC effectively acts as a USB-to-high-speed-parallel bridge for the
Cyclone. The intention is to run it at 48MHz (12MIPS) and run the parallel
interface at 12MHz (Fosc/4, the fastest possible speed).
One of the things I was
trying to achieve when I was looking at doing this in pure TTL was a
degree of parallelism - because the device doesn't attempt to understand
the drive's data stream (that's done later on the host PC), it can't
benefit from re-seek or re-read attempts anyway, so there's no
requirement to ever pause buffer fill and try again.
The FPGA logic I'm using doesn't make any attempt to decode the bitstream,
unless the MFM sync-word detector is enabled. In that case, it won't record
anything until a specified sync-word is detected in the bitstream. If the
bitstream isn't MFM it probably won't ever start (and after a few seconds the
PC will probably time out).
Uh huh. So I do think that theoretically you could
have a transition
time the length of the track. No likely, but possible. In the middle of
that extreme and 'normal data' there may well be transition times that
are quite high, so they do need to be recorded (so that you can
hopefully recover sectors of a damaged track beyond the bad spot)
Thing is, the AGC on the head amplifier will probably start boosting the gain
if it doesn't see any transitions in, say, 1/32 of a revolution. If that
happens, then you'll get a nice stream of garbage (more likely spurious
transitions inserted than transitions missed).
The only way I can think of to get around that would be to remove the head-amp
and bolt on an analogue amplifier, sample the whole track at (say) 20
megasamples per second, then drag the data into a PC and analyse it. I wonder
if you could use some tricks from modern hard discs -- PRML and the like -- to
recover data from blocks where the magnetic transitions are indistinct.
For sure - or worse. I've still recovered useful
data from drives that
have been 80% bad - sometimes it's worth it.
True. I had an 8.4GB Maxtor that was almost completely dead. Chucked it in the
freezer, and nearly all of it was unreadable... except my mailspool. The loss
of a few weeks of work (which was backed up) was pretty minor compared to the
loss of five years of e-mail :)
The reader
hardware is going to need
some way of dealing with these errors, even if that's just stepping the
resolution down and storing a less-accurate measurement of the dead-time.
Hmm, so you're proposing that the reader actually tries to understand
the storage mechanism? I was thinking that it was a dumb device,
basically copying the transitions that it sees to the host PC - and it
was the software on the PC which actually does the decoding (and
potentially requests re-read attempts at a later date).
No, I'm not proposing that at all -- my goal is to create a generic
reader/writer and do all the decoding work in software. "It slices, it dices,
it makes coffee, it feeds the cat!* (* Subject to software availability)" :)
However, a) I'm not sure if PCI is actually fast
enough for what's
needed (i.e. the system could sample into memory from a drive quickly
enough), and b) that we have anyone 'on-tap' who knows how to build a
PCI card anyway... :-)
I was going to say "but a PCI device can't take over the bus", then I
realised
you've got DMA and bus-mastering to play with... So you could allocate a block
of RAM, and have the FDD controller write bytes (or 32-bit DWORDs) straight to
RAM.
That's probably worth looking into, but I know very little about PCI device
design...
I'd still
consider the ultimate to be some form of non-contact disc
drive, but that would involve custom-made FDD heads and other such "fun".
Well for hard disks they're all flying heads anyway...
Only while the disc platters are spinning, AIUI...
My ultimate would be something which recorded the
signal at a more
analogue level I think, for potential cleaning up in software later
(rather than using a digital interface which can't perform an
intelligent analysis of the data stream). I think it's do-able for a
floppy drive, and probably without a lot of modification to a donor
drive itself.
True. If you can live with read-only, it would be a head amplifier and an A/D
converter. The Commodore 1541 schematics (and the older CBM drive manuals..
1540?) might be a good reference -- IIRC some of those used discrete amplifier
circuitry instead of an all-in-one head amplifier/threshold detector IC.
(I've mused before on here about running the
entire drive in a bath of
something which might reduce friction and the chances of damage due to
contamination - it'd be interesting purely from an experimentation point
of view, but I'm not sure if it'd ever be possible to prove that it
actually helped)
Sounds like a nice idea, but I'd be somewhat worried about the effects of
whatever chemical you're using on the motor, and its effect on the head/disc
distance.
I'd be inclined to think it would do more harm than good...
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/