8 Mar
2011
8 Mar
'11
11:03 a.m.
At 23:56 -0600 3/7/11, Jules wrote:
Yes, that seems to be the 'famous' one that
gets mentioned everywhere. It
seems it was of the shift-add variety. Anyone recall if it would work with
signed integers? (I'm just trying to work out how the math works for signed
multiplies at the moment)
I have a scanned .pdf of the 6809 programmer's manual here,
happy to send out if anyone wants it, but it's 12.8 MBytes. (I got it
from the freescale website, since reorganized; it's
online at
http://www.maddes.net/m6809pm/ .)
It says the MUL instruction A x B -> D (unsigned) takes 11
MPU cycles. ADD instructions take a minimum of 2 cycles, as do shift
(roll, etc) instructions. So I think maybe there must have been some
silicon (vs. microcode) involved in the multiply? I don't see how the
shift-add sequence could be done in only 11 cycles.
MUL is unsigned arithmetic only.
--
- Mark 210-379-4635
-----------------------------------------------------------------------
Large Asteroids headed toward planets
inhabited by beings that don't have
technology adequate to stop them:
Think of it as Evolution in Fast-Forward.
8 Mar
8 Mar
11:15 a.m.
On Tue, 8 Mar 2011, Mark Tapley wrote:
Date: Tue, 8 Mar 2011 10:03:05 -0600
From: Mark Tapley <mtapley at swri.edu>
Reply-To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
To: cctalk at classiccmp.org
Subject: Re: hardware multiply/divide functionality in CPUs (6809)
At 23:56 -0600 3/7/11, Jules wrote:
Since its an 8x8 multiply it should only take 8 cycles with shift+add
Peter Wallace
Yes, that seems to be the 'famous' one
that gets mentioned everywhere. It
seems it was of the shift-add variety. Anyone recall if it would work with
signed integers? (I'm just trying to work out how the math works for signed
multiplies at the moment)
I have a scanned .pdf of the 6809 programmer's manual here, happy to
send out if anyone wants it, but it's 12.8 MBytes. (I got it from the
freescale website, since reorganized; it's online at
http://www.maddes.net/m6809pm/ .)
It says the MUL instruction A x B -> D (unsigned) takes 11 MPU
cycles. ADD instructions take a minimum of 2 cycles, as do shift (roll, etc)
instructions. So I think maybe there must have been some silicon (vs.
microcode) involved in the multiply? I don't see how the shift-add sequence
could be done in only 11 cycles.
MUL is unsigned arithmetic only.
--
- Mark 210-379-4635
-----------------------------------------------------------------------
Large Asteroids headed toward planets
inhabited by beings that don't have
technology adequate to stop them:
Think of it as Evolution in Fast-Forward.
7:34 p.m.
Mark Tapley wrote:
At 23:56 -0600 3/7/11, Jules wrote:
I see what you mean - I wonder if the actual add only takes one cycle, but
there's an additional 1-cycle overhead (none of the instructions seem to be
less than 2 cycles) which doesn't scale to 8 shifts/adds needed for an
8-bit multiply? That would make sense, I think - 8 cycles of shifts/adds,
standard 1 cycle overhead, and 2 more cycles eaten up doing housekeeping
"stuff".
cheers
Jules
Yes, that seems to be the 'famous' one
that gets mentioned everywhere. It
seems it was of the shift-add variety. Anyone recall if it would work
with
signed integers? (I'm just trying to work out how the math works for
signed
multiplies at the moment)
I have a scanned .pdf of the 6809 programmer's manual here, happy to
send out if anyone wants it, but it's 12.8 MBytes. (I got it from the
freescale website, since reorganized; it's online at
http://www.maddes.net/m6809pm/ .)
It says the MUL instruction A x B -> D (unsigned) takes 11 MPU
cycles. ADD instructions take a minimum of 2 cycles, as do shift (roll,
etc) instructions. So I think maybe there must have been some silicon
(vs. microcode) involved in the multiply? I don't see how the shift-add
sequence could be done in only 11 cycles.
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