Jules> Strange how they don't interleave the first couple of Jules> cylinders for the Rainbow. Why is that? It there some Jules> situation where it's necessary to write some form of boot Jules> sectors on the disk in order? I have no idea. I just quoted what I learned some years past (which is what that comment reports). I no longer remember where I learned it, and I never heard *why* it was done this way. Jules> For RT11 it sounds like there are issues with the hardware Jules> finding the index hole and being able to react in time to read Jules> the first sector on the track, hence the offset within the Jules> track to the first logical block on that track? It's not really RT11 that's the issue here, the original RX50 was in the PRO. It has a typically crude PRO disk controller, with a single sector buffer on the I/O card that is filled or emptied by the OS driver one byte at a time. Shades of IDE PIO mode. The hard disk works the same way! Anyway, my assumption is that the interleave parameters -- both the sector interleave and the track skew -- were chosen to optimize performance. This is a common technique in older storage systems with limited buffering; for example, CDC used it in its 60 bit mainframes. The sector interleave allows you to move the data from the controller to host memory and then catch the next logical sector without having to wait a whole revolution. Track skew lets you do a single cylinder head step and then catch the next logical sector on the same revolution. All this assumes some specific system timing -- in this case, presumably the F11 CPU and the PRO bus and controller timings. The later controllers for other DEC machines inherited this format for backwards compatibility -- it's quite unlikely that it actually is needed for performance in those faster machines with better controllers. paul