Tim Shoppa wrote:
A couple points made in the past day that I can't resist following up
on with my contradictory experience:
I think, rather, that that's a good portion
of the explanation of why they
were so slow.
Ballpark example, take a 12AU7: the sum of the grid-to-plate and
grid-to-cathode capacitance is around 3 pF. Suppose the network resistance
feeding the grid circuit is 250 KOhm, that's an RC time constant of 0.75uS,
a little better than just 1 MHz. (R can be reduced of course but power
consumption is then on the climb.)
(Not to say there weren't other reasons they were slow..)
In fact, if you build similar flip-flop circuits out of transistors
(essentially RTL) you'll end up with very similar counting speeds.
The same tricks that speed up transistor flip-flops will speed up
tube flip-flops: First you add some "speedup capacitors" to help
overcome grid/base capacitance storage effects. Then you start
eating away at your component variation/supply voltage variation
margins to get extra speed at the cost of hand-picked parts.
(TI did produce an IC family using the parallel capacitor technique: Series 51
RCTL, SN51x.)
Flip-flops are one thing, gates are another, the applicability of speed-up caps
depends upon the gate design. In the case of the resistive sum point designs as
were being discussed originally, I don't think speed-up caps would help the
problem, as opposed to just presenting a different, and possibly worse,
set of settling sequence/conditions for the gate.
Then you start thinking about active pull-ups instead
of
just resistive pullups.
Then you go to totem-pole structures. The concept works the same
in both tubes and transistors. But until IC's you don't see it
used an awful lot because with discretes, totem poles mean more
parts. Even into the 80's NMOS and PMOS were still cutting
edge and then the chip industry didn't go whole-heartedly
into CMOS until the mid-80's.
The plate R at saturation for typical (signal) tubes is still multiple KOhms,
active pull-ups or totem pole structures are not going to help lower the output
impedance significantly. It would help lower the low-state output voltage and
hence increase the voltage swing between the two output logic states. The
latter point may make design requirements for the gate input circuitry easier,
but overall I don't think speed would be helped, and it comes at great expense.
There may be exceptional situations such as a system clock driver, using
high-power tubes with plate R in the hundreds of ohms, where it might be worthwhile.
Brent wrote:
And how feasible would it have been to replace
those ring counters with 4-bit
binary decade counters to save a lot of tubes? Perhaps it wouldn't have helped
much because of the way the values from each counter were transmitted around
the machine. Binary counters were around by then of course, I'm not sure when
binary counters were first wrapped into decade counters ( by late 40's at
latest).
Both BCD counters and ring counters made out of tubes were around
before WWII, and of course both were used a lot in WWII radar equipment.
The earliest reference I know is Williams, "High Speed Thyratron
Automatic Counting", Proc Roy Soc May 1932, mentioned in Electronics,
July 1932, p 232.
I've never had an opportunity to study early radar stuff in depth. I know pulse
circuitry developments were wrapped up with radar efforts and the original gate
design (the 'coincidence gate'), but what were counters beyond a few flip-flops
and decade counters being used for there?
The flip-flop tube count difference is really very
very minor: 5 tubes for a
Johnson ring counter, 4 tubes for a BCD counter, and the BCD counter takes some
cleverness to avoid the use of diodes (in the 50's could've been either
vacuum or solid state) for gating. And the ring counter is
much more easily decoded into ten digits for display.
Johnson counters / switch-tail ring-counters are another nice suggestion but I
thought/believe ENIAC stuck to straight ring counters with 10 FFs per digit.
ENIAC moved numbers around the machine (and accomplished arithmetic) by
transmitting the appropriate number of pulses from each digit of a register
down parallel digit lines. I believe this was accomplished by cycling the digit
counters through 10 counts (so they end up in the same state) but gating out
only those between 0 and the final state, with an alternative to produce the
complement when subtracting.
One needs to detect 0 in this scheme, easy with a ring counter, but it requires
a 4-input gate with a BCD counter. A 4-input gate is achievable with various
degrees of tradeoff between complexity and reliability. A resistive approach is
the simplest but the least reliable, and I wonder if Eckert completely avoided
such gates in the design, so one might as well just stick with ring counter in
the balance.
..anyways, that was the sort of reasoning I was wondering about when I asked
the question.
All the tube frequency counters from the 50's I've encountered used 4-bit
counters.
I have wondered why the HP524 (or the original HP520 from the late 40's/early
50s) didn't use a Johnson counter for the 10MHz stage, as opposed to the weird
and complex 4-bit-with-gate scheme it did use. Perhaps there were patent issues.
Note that a lot of tube decade counters even into the
60's didn't
use strict BCD or string ring arrangements, instead they always
chose an arrangement that was most easily decoded for the application.
Yes, I run across that all the time in everything from tube equipment to ICs.
1242 was almost as common as 1248 in 60's era calculators.
In frequency counters, where arithmetic did not have to be performed on the
values, whatever sequence made the feedback circuits and display decoding as
simple as possible seems to have been chosen.
Note that even in solid state IC form both schools are
thoroughly
established: The CMOS 4017 is a ring counter, the TTL 7490 is a BCD
counter. Usually the ring counter was used where there was no need
for any BCD coding. And the TTL nerds who didn't understand ring
counters always used 7490's followed by a 7442 decoder when they
wanted 10 decoded outputs, when they should've been using a ring
counter to begin with!
The 4017 is great for quick and simple clock sequencing schemes, TTL should
have had something like it.