The most common way in my experience is to `quote' with underscores, which would make that _The Design of OS/2_ by Deitel and Kogan .... But then, in my experience, 469-character lines are considered a bad idea, too, so make up your own mind.... /~\ The ASCII der Mouse \ / Ribbon Campaign X Against HTML mouse at rodents.montreal.qc.ca / \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B

I've dug out the appropriate books (I hope). Firstly, from the Intel 80286 data sheet : 'Double Fault and Shutdown If two separate exceptions are detected during a single instruction execution, the 80286 performs the double fault exception (8). If an execution (I think this should be 'exception' -- ARD) occurs during processing of the double fault exception, the 80286 will enter shutdown. During shutdown, no further instrucions or exceptions are processed. Either NMI (CPU remains in protected mode) or RESET (CPU exits protected mode) wcan force the 80286 out of shutdown. Shutdown is externally signaled via a HALT bus operation with A1 low.' According to another bit of the data sheet : COD/INTA* = 0, M/IO* = 1. S1* = 0. S0* = 0 -> If A1=1 then halt, else shutdown. So that's what a shutdown looks like on th CPU pins. Now to the IBM PC/AT Techref. I am looking at the Type 2 System Board diagrams (this is the verion with 256K DRAMs), but similar logic exists on the Type 1 board (which uses those 128K piggyback RAM modules). OK, on sheet 21 of the schemaitc, we have U84b (a '27 NOR gate). This NORs S0, S1, and A1, and the output goes high if it's a shutdown/interrupt acknowledge cycle. This clocks the state of the M/IO* line into U105b (a '74 D-type), the output of this flip-flop goes high if it's actually a shutdown cycle. The output of that is delayed twice and inverted by a couple more '74 D-types, and becomes the 'Shutdown-' signal. Turn back to page 1, that's logically ORed with power-fail signal to form the CPU reset signal. Note that the rseet signal from the keyboard controller (page 16), called 'RC', sets U105b, and resets the CPU that way. So it's partly down to the 80286 (detecting the triple fault and doing a shutdown) and partly down to IBM hardware (forcing a reset if this happens). -tony