I'm not at all certain about any of the mission details regarding the January 1986 (final) Challenger mission. I will yield to your obviously more accurate and current information. Having known that I'm gradually going soft in the head for some time, I'm not surprised or concerned that don't remember precise details about the final Challenger mission. I am quite certain, however, that the documents and schematics which were given to me as part of a FMEA/CIL team, which was a part of the NASA "shuttle-return-to-flight" mission the following fall, were relating to the Honeywell 516. These were not the main computers, of which there are several, but only the engine controllers, which are configured as redundant pairs, one for each engine. There was talk of a plan on the table at the time to replace these with something smaller and lighter, using semiconductor memory and having other features, but the one which we spent half a year studying, at great expense to the taxpayer, and which was purported to be used as that controller was definitely the Honeywell 516. Perhaps there were other more popular models of that number, but the one on the shuttles at that time were all of this type. These were NOT the main computers on the shuttle, but rather the dedicated main engine controllers. The IBM numbers to which you refer do sound to me like the main computers. Analysis of the engine controllers, however, is what our assigned task was, and that's what I remember. I don't suppose they would have had 50 or so of us working for six months on something that wasn't involved. It's conceivable, however, that there are several versions of this processor. It doesn't seem reasonable that they would have used two of a processor weighing what you attribute to the 516. 2.5 cu meters, however, is a small room, and sounds like approximately a 6' rack cabinet, or maybe even a pair. Are you perhaps including a bit of packaging hardware? What's used to control the engine is the processor. The technology is of the same vintage as the DEC PDP-8's I've seen, with hand-wired backplanes and built from ttl-msi. This one used plated wire memory, since that was a mite faster (1 us) than the core of the time(1.2 us). Let's see . . . the IBM AP-101S uses 1/40 cu Meter . . . that's a bit less than a cu. ftm 30 kg and 550 watts. . . . seems reasonable. That they later used one of its IOP's to replace the old model in use on the Challenger and other shuttles at the time seems reasonable as well. Unlike the defense industry and certainly unlike the commercial computer industry, the domain of flight hardware is controlled by "proven-reliable" hardware, so the "current" technology of the time, and the shuttle was designed in the late '60's and built in the '70's, was not the technology of choice. What's more, the engines in use in the early-mid '80's were hand-tweaked hangar queens, not some sort of production hardware. The controllers used "proven" software, which reflected all the caveats of the NASA policy of the time. It's not always the latest technology that you want on your 2-billion-dollar aircraft, but rather the most reliable that does the job. Dick ---------- <classiccmp(a)u.washington.edu> invented the internet?) performed consumes