Thanks Al, for giving me a retro-headache, that chip's architecture is even worse than I remembered :-) It's truly a terrible architecture. The subroutine call mechanism is a trivial software convention, you could do it on any machine that had one unit of storage to dedicate. Only 32 one-deep calls are allowed; 32 is an 8x300 limitation. The trick is that CALL and RETURN are macros. Here's how it's done, example trivial code fragment: 0100: CALL subr / This jump subroutine... 0102: ... / ...returns here, 0103: ... 0200: CALL subr / and this call... 0202: ... / ...returns here. subr: code here ... RETURN One 8x300 register is set aside for the return linkage mechanism, let's call this RETN. The macroassembler does the work. A local (to the assembler) variable, let's call it R, increments with every CALL macro expansion, arbitrarily from the top of the souce file to the bottom. At the same time, a jump table, call it JUMPS, is constructed where the Rth entry is [pc + 2], that is, the address to return to after the call. (2 instructions are needed to do the CALL.) CALL expands to: xmit R, RETN / store R in register RETN jump subr RETURN expands simply to: XEC RETN, JUMPS / execute JUMPS[RETN] I'm certain I have the syntax wrong, no matter. The jump table called JUMPS looks like: JUMPS: jump 0102 / first call + 2 jump 0202 / second call + 2 ... / etc It would be 'interesting' to cobble up a mechanism capable of recursion, but likely it would be larger than many subroutines. It could certainly be done though, and worse things have been shipped.