10 Jan
1998
10 Jan
'98
12:45 p.m.
Hi everybody. First off, let me ask- does anyone else have a Model II?
I've been working on mine recently and I can't get it to work. When I got
it the CRT was loose and rattling around the case and the power and reset
switches were broken apart. I got these things sorted out and powered it
up to get a screen filled with hash. It seems to roll around the screen
and no characters are visible, just hash.
I put a test clip on the Z80 and found very little activity. The only pin
toggling is the clock. All of the address, data, and most of the control
bus lines and either low or (apparently) tri-stated. I checked the BUSRQ*
line to see if maybe something was asking for the bus and it was high.
The BUSAK* output is low, however. Shorting NMI* to ground has no effect
whatsoever. After it's been on for a while, turned off and right back on
again, the screen remains blank.
I changed out the Z80 for a known good one with no effect. I happened to
note, however, that the computer generates lots of TVI, and the pattern
changes during reset.
If anyone has any suggestions, they would be most welcome. Also, if
anyone has any schematics for this thing, that would help too.
(Alternatively, if you know that a certain part is the same as the Model
I, III, or 4, let me know as I have the schematics and working examples of
these.)
Richard Schauer
rws(a)ais.net
10 Jan
10 Jan
1:38 p.m.
A non-text attachment was scrubbed...
Name: not available
Type: text
Size: 1868 bytes
Desc: not available
Url :
http://www.classiccmp.org/pipermail/cctalk/attachments/19980111/aefb258d/at…
9:31 p.m.
On Sun, 11 Jan 1998, Tony Duell wrote:
........
What is the reset pin doing at the Z80? And what is
the WAIT* pin doing.
I wonder if the CPU is either stuck in the reset state, or in a wait
state.
RESET* is low for about 500 ms after power-on, then goes high. WAIT* is
always high.
I'm pretty sure that if the CPU is halted, it
continues to produce
refresh addresses, so you'd see some activity on the address lines and on
RFSH*. Can't hurt to check, though.
RFSH* is at a solid 1.4v, and doesn't move with a pull-up.
I assume the clock input is going high enough - from
memory a TTL output
needs a pull-up to drive a Z80.
CLOCK is swinging from 0.2 to 4.8v at 4MHz.
You really need to be able to distinguish
'Low' from 'Tristate'. If
you're using a 'scope, then pull the input to the Vcc (+5V) line through
a resistor equal to the 'scopes input impedance (1M for most 'scopes, 10M
if you're using a *10 probe) so that the trace floats at 2.5V and
indicates highs and lows. Very few logic analysers (the HP LogicDart is
an exception) have high/low/undefined inputs, alas.
Well, I did almost as you said. I had a 47k resistor laying handy on
the bench, so I used it. Part of the address bus is low (0.2 or 0.3v),
part is tri-stated. Data bus lines D0-D2 and D7 are at a firm 1.4v. D3
is tri-stated and can be pulled to 5v. D4-D6 are low and pull-up to 1.4v.
Now, here's where it gets interesting. NMI* had an irregular pulse train
coming into it- at the same time the display was flickering. I shut off
and turned on again, and the display was blank and NMI* was high. INT*,
WAIT*, BUSRQ*, and RESET* are high, BUSAK* is low, and HALT*, MREQ*,
IORQ*, RD*, WR*, M1*, and RFSH* are all at a solid 1.4v. (???)
Do you have a schematic of the gate-array version of
the M4 CPU board?
I've got an M4 here with said board, and it's the only part of the system
that's not covered in the M3 Techref (which I also have), so I am looking
for a copy/scanned in version of the diagram.
I would buy a Model 4 technical manual, but Tandy in the UK are totally
clueless and assured me that there was no such machine as a 'TRS-80' :-)
I have a 6-page schematic for the CPU, and it shows 4 PAL's. It is dated
23 Feb 1983. Contact me privately and we'll work out how to get it from
here to there.
Richard Schauer
rws(a)ais.net
11 Jan
11 Jan
6:03 a.m.
A non-text attachment was scrubbed...
Name: not available
Type: text
Size: 2770 bytes
Desc: not available
Url :
http://www.classiccmp.org/pipermail/cctalk/attachments/19980111/6d3c58c8/at…
12:22 p.m.
On Sun, 11 Jan 1998 17:03:28 +0000 (GMT), you wrote:
Alas, I think that's the older version of the CPU board. Is there a 6845
on it? Later versions, like the one in my machine, have a custom Tandy 40
pin gate array alongside the CPU which contains most of the video
circuitry, etc.
On the other hand, it's a lot better than nothing, so if you could make a
copy of it, we can come to some arrangement about getting it to me.
I have a TRS-80 MODEL II TECHNICAL REFERENCE HANDBOOK
Catalog Number 26-4921 dated 1980 and a flatbed scanner so any pages
you would like to see i could email them to you direct .........
Cheers Chris Denham cdenham(a)tgis.co.uk
On Sun, 11 Jan 1998, Tony Duell wrote:
........
Wait a second... It's at a constant, DC 1.4V? Are you sure?
You're not missing a power line, are you? I suppose a low supply rail on
chips driven by this signal could cause some strange happenings. Check
all the outputs from the power supply with a 'scope. Apart from that, I
am confused. There's no way a TTL output should be stuck at that voltage.
What is the reset pin doing at the Z80? And what
is the WAIT* pin doing.
I wonder if the CPU is either stuck in the reset state, or in a wait
state.
RESET* is low for about 500 ms after power-on, then goes high. WAIT* is
always high.
I'm pretty sure that if the CPU is halted, it
continues to produce
refresh addresses, so you'd see some activity on the address lines and on
RFSH*. Can't hurt to check, though.
RFSH* is at a solid 1.4v, and doesn't move with a pull-up. part is tri-stated. Data bus lines D0-D2 and D7
are at a firm 1.4v. D3
is tri-stated and can be pulled to 5v. D4-D6 are low and pull-up to 1.4v.
Kersqueeble... What on earth is going on here.
Now, here's where it gets interesting. NMI*
had an irregular pulse train
coming into it- at the same time the display was flickering. I shut off
There may well be an interrupt from the display system to the CPU - a
sort of poor-mans heartbeat for the real time clock.
and turned on again, and the display was blank
and NMI* was high. INT*,
WAIT*, BUSRQ*, and RESET* are high, BUSAK* is low, and HALT*, MREQ*,
IORQ*, RD*, WR*, M1*, and RFSH* are all at a solid 1.4v. (???)
That 1.4V worries me. What about the buffers on these signals? Are they
getting the 5V power?
Do you have a schematic of the gate-array version
of the M4 CPU board?
I've got an M4 here with said board, and it's the only part of the system
that's not covered in the M3 Techref (which I also have), so I am looking
for a copy/scanned in version of the diagram.
I would buy a Model 4 technical manual, but Tandy in the UK are totally
clueless and assured me that there was no such machine as a 'TRS-80' :-)
I have a 6-page schematic for the CPU, and it shows 4 PAL's. It is dated
23 Feb 1983. Contact me privately and we'll work out how to get it from
here to there.
Richard Schauer
rws(a)ais.net
13 Aug
13 Aug
7:37 a.m.
New subject: TRS-80 Tech. manual (was: help with TRS-80 Model II?)
I have a TRS-80 technical manual... any interest.
Christopher Denham wrote:
On Sun, 11 Jan 1998 17:03:28 +0000 (GMT), you wrote:
Alas, I think that's the older version of the CPU board. Is there a 6845
on it? Later versions, like the one in my machine, have a custom Tandy 40
pin gate array alongside the CPU which contains most of the video
circuitry, etc.
On the other hand, it's a lot better than nothing, so if you could make a
copy of it, we can come to some arrangement about getting it to me.
I have a TRS-80 MODEL II TECHNICAL REFERENCE HANDBOOK
Catalog Number 26-4921 dated 1980 and a flatbed scanner so any pages
you would like to see i could email them to you direct .........
Cheers Chris Denham cdenham(a)tgis.co.uk
--
_________________________________________
| Cord G. Coslor : archive(a)navix.net |
| Deanna S. Wynn : deannasue(a)navix.net |
|-----------------------------------------|
| PO Box 308 - Peru, NE - 68421-0308 |
| (402) 872- 3272 |
|_________________________________________|
On Sun, 11 Jan 1998, Tony Duell wrote:
........
Wait a second... It's at a constant, DC 1.4V? Are you sure?
You're not missing a power line, are you? I suppose a low supply rail on
chips driven by this signal could cause some strange happenings. Check
all the outputs from the power supply with a 'scope. Apart from that, I
am confused. There's no way a TTL output should be stuck at that voltage.
What is the reset pin doing at the Z80? And what
is the WAIT* pin doing.
I wonder if the CPU is either stuck in the reset state, or in a wait
state.
RESET* is low for about 500 ms after power-on, then goes high. WAIT* is
always high.
I'm pretty sure that if the CPU is halted, it
continues to produce
refresh addresses, so you'd see some activity on the address lines and on
RFSH*. Can't hurt to check, though.
RFSH* is at a solid 1.4v, and doesn't move with a pull-up. part is tri-stated. Data bus lines D0-D2 and D7
are at a firm 1.4v. D3
is tri-stated and can be pulled to 5v. D4-D6 are low and pull-up to 1.4v.
Kersqueeble... What on earth is going on here.
Now, here's where it gets interesting. NMI*
had an irregular pulse train
coming into it- at the same time the display was flickering. I shut off
There may well be an interrupt from the display system to the CPU - a
sort of poor-mans heartbeat for the real time clock.
and turned on again, and the display was blank
and NMI* was high. INT*,
WAIT*, BUSRQ*, and RESET* are high, BUSAK* is low, and HALT*, MREQ*,
IORQ*, RD*, WR*, M1*, and RFSH* are all at a solid 1.4v. (???)
That 1.4V worries me. What about the buffers on these signals? Are they
getting the 5V power?
Do you have a schematic of the gate-array version
of the M4 CPU board?
I've got an M4 here with said board, and it's the only part of the system
that's not covered in the M3 Techref (which I also have), so I am looking
for a copy/scanned in version of the diagram.
I would buy a Model 4 technical manual, but Tandy in the UK are totally
clueless and assured me that there was no such machine as a 'TRS-80' :-)
I have a 6-page schematic for the CPU, and it shows 4 PAL's. It is dated
23 Feb 1983. Contact me privately and we'll work out how to get it from
here to there.
Richard Schauer
rws(a)ais.net
12 Jan
12 Jan
2:39 p.m.
New subject: TRS-80 Tech. manual (was: help with TRS-80 Model II?)
Cord Coslor wrote:
I have a TRS-80 technical manual... any interest.
Which one? The many models through the several TRS-80 product lines
generated quite a few. The Model II under discussion had a manual in
a heavy brown binder, the Model I was a black spiral-bound paperback,
the Model III had a light brown perfect-bound paperback.
Check the date on your system or your ISP's. Somehow this message
showed up with a sending date of last Aug 13.
--
Ward Griffiths
Dylan: How many years must some people exist,
before they're allowed to be free?
WDG3rd: If they "must" exist until they're "allowed",
they'll never be free.
14 Aug
14 Aug
5:24 a.m.
New subject: TRS-80 Tech. manual (was: help with TRS-80 Model II?)
Actually, Ward, the Model 3 ($ 4) also had a tech manual in a brown
'leather' binder as well.
CORD
Yeh, I'm switching my date now :-)
Ward Donald Griffiths III wrote:
Cord Coslor wrote:
--
_________________________________________
| Cord G. Coslor : archive(a)navix.net |
| Deanna S. Wynn : deannasue(a)navix.net |
|-----------------------------------------|
| PO Box 308 - Peru, NE - 68421-0308 |
| (402) 872- 3272 |
|_________________________________________|
I have a TRS-80 technical manual... any interest.
Which one? The many models through the several TRS-80 product lines
generated quite a few. The Model II under discussion had a manual in
a heavy brown binder, the Model I was a black spiral-bound paperback,
the Model III had a light brown perfect-bound paperback.
Check the date on your system or your ISP's. Somehow this message
showed up with a sending date of last Aug 13.
--
Ward Griffiths
Dylan: How many years must some people exist,
before they're allowed to be free?
WDG3rd: If they "must" exist until they're "allowed",
they'll never be free.
9670
days inactive
9672
days old
7 comments
5 participants
participants (5)
-
archive＠navix.net -
ard＠p850ug1.demon.co.uk -
cdenham＠tgis.co.uk -
gram＠cnct.com -
rws＠ais.net