6 Sep
2006
6 Sep
'06
6:30 a.m.
Subject: PDP-8m Console Switch Problems
From: Don North <ak6dn at mindspring.com>
Date: Wed, 06 Sep 2006 01:11:51 -0700
To: General Discussion: On-Topic and Off-Topic Posts <cctalk at
classiccmp.org>
Cc: cctech at classiccmp.org
*****some snippage done....
Of the front panel switches, DEPOSIT, EXAM, CONT all
work fine.
The CLEAR, EXTD ADDR LOAD, and LOAD ADDR switches are nonfunctional.
What I see is strange behavior in the debounce circuit, and in fact
the debounce circuit itself is one I have never seen before (and IMHO
the designer should be hung by his entrails).
In ASCII art, here is a synopsis of the circuit:
+5V +5V 1/6*7404
| 1/4*74S175 | |\
/ +-----+-----+ | \ to
470 \ GND--| Dn Qn |------| >O-----9318
ohm / | | | / priority
\ GND--|>Clk QBn |O--+ |/ encoder
| | | |
+-------------o| MR~ | |
| +-----+-----+ |
| | |
__O ADDR GND |
O-/ LOAD |
| O------------------------------+
|
+----+
|
__O XTND
O-/ LOAD
| O---------->QBn...
|
+----+
...
|
__O
O-/ DEPOSIT
| O---------->QBn...
GND
If you understand TTL and specifically TTL FFs then this is both
logical and sane.
Most NON-BUFFERED (74x74, 74x174, 74x175) D-FFs the output is fed back
to the opposites input so any overload or transient to ground or Vcc
(not safe for device) at the output will affect the devices state.
Obviously if either output is "forced" to a state the other will follow
inverted. The caveat is if either input cannot change due to internal
failure or external logic failure the state will not change but you
may see pulses when it tries to change.
Pulling to ground is is safe as the output current (top transistor)
is limited where the lower transistor can conduct hard.
Unorthodox looking but, completely legit. You would get the same effect
using a pair of (two from) inverters (7404 for example) cross coupling
them and putting a switch across the outputs to debounce the switch.
Bottom line is it worked for 30+ years and something else is broken.
Now one of the things I've seen with older TTL is inputs that are stuck
(likely ESD or other on die failure) to either Vcc or Ground. This could
be either the '174 or the gate/inverter they drive is failed this way.
I've replaced the top 74S175 device (originally a
Signetics 74S175
date code 1970) with a socket, and have tried other 74x175 parts
but none work at all (NAT 74LS175 1983, TI 74AS175 1986, SIG 74S175
1984, TI 74175 1974). Even on the bench in a proto board I can't
get any of these devices to behave like the original. Yanking the
QB~ output to hard ground does not force the Q output high. So
was DEC relying on the aberrant behavior of a 1970 Signetics 74S175?
No, I've done this with TI, Signetics, National and others.
I'm about ready to rip out the two bogus '175s
and replace them with
some other logic (three '00s if I calculate correctly).
Anybody have any other ideas on what to look for or at?
Check the down stream logic for stuck inputs. When I repaired my 8f
(1973 manufacture date) I had several gates with the inputs stuck
(the driving gate was ok) where the input was hard high or hard low
at the pin and it was the gate itself not driving logic at fault.
A milliampmeter confirmed one gate (7400) with pin 1 hard to VCC
(Iol was >100ma). Drove me nuts as the first part replaced was
a 7474 driving that gate with no fix!
I'd give the 7404 the hairy eyeball! A quick test is socket a '175
with the Q and /Q output pins floating and using a jumper to ground
make it flip [It WILL NOT IF MR/ is asserted, you can bend out the
MR/ pin to avoid that.]. Then test the '04 for input changes output.
Allison
7 Sep
7 Sep
12:49 a.m.
New subject: PDP-8m Console Switch Problems - fixed!
Allison wrote:
Well, I am seeing
something very different here. I built a breadboard
with the circuit under question: 74x175 device, 470ohm to +5V on MR~,
CLK and Dx inputs forced to ground. I connected voltmeters to the
Q and Q~ outputs, and then tried forcing Q and Q~ alternately to ground
to see if I could change the state of the device.
I had a number of devices to test, here are the results:
DATE
MFG DEVICE CODE RESULT
--- ------ ---- ---------
TI 74175 87 FAIL, shorting Q~ to gnd never changes Q to high
SGS 74LS175 82 ditto
TI 74AS175 87 ditto
SIG 74S175 84 PASS, with 470ohm pullup to +5V on Q req'd for Q0-Q3
SIG 74S175 76 PASS, Q1-Q3 work w/ no resistor, Q0 requires 470ohm
For the failed devices, I tried with no pullup, and 100, 470, 1K, 4.7K
pullups to +5V on Qx. No value of pullup made any difference. Shorting
a Q~ signal (at ~4V) to ground never changed Q (at ~0.4V) to a HIGH.
The only two devices to exhibit the 'correct' behavior were the Signetics
74S175s. The original 1976 datecode device (I removed intact from the
PDP-8m;
it is actually GOOD as it turns out), and a later 1984 datecode device.
The 7404 on the output seems OK, as is the rest of the downstream logic
(the priority encoder). I measured the input currents required on a
suspect '04 input to set the output high and low and they are well within
spec (about +20uA for input high, -0.7mA for input low). With the 74S175
out of its socket I could set all the 7404 inputs H/L and observe the
downstream priority encoder outputs were just as expected.
I have about 15 of the 1984 Signetics 74S175s, I tried all of them in
the console board socket; none of them worked, even a little bit, with
no pullups added.
So I added 470ohm pullups to +5V on the 74S175 Q outputs to 7404 inputs.
Everything started working as would be expected. The switch decode logic
is now 100% functional.
My thought is that the output pullups on the 74S175 Q pins are trying to
pull those outputs high fairly strongly (10mA load) but the Q output can
still drive a valid low (it is a 20mA schottky driver). This pullup
'preloads' the output, so that a kick on the QB~ (by shorting to gnd)
gets the Q output moving high, the resistor keeps it moving high, able to
override some smaller internal driver trying to keep the output low.
At least that is the only rational explanation I can think of right now.
Just the 7404 by itself is a -1mA low, +40uA high load; not very much.
In any event, the fix is simple (three resistors really, but I'll add one
on each of the six used outputs). Turns out all the original logic chips
appear to be good (I had removed the original 74S175 intact for testing).
Thanks to everyone for all the suggestions and helpful hints.
Don
If you understand TTL and specifically TTL FFs then
this is both
logical and sane.
Most NON-BUFFERED (74x74, 74x174, 74x175) D-FFs the output is fed back
to the opposites input so any overload or transient to ground or Vcc
(not safe for device) at the output will affect the devices state.
Obviously if either output is "forced" to a state the other will follow
inverted. The caveat is if either input cannot change due to internal
failure or external logic failure the state will not change but you
may see pulses when it tries to change.
Pulling to ground is is safe as the output current (top transistor)
is limited where the lower transistor can conduct hard.
Unorthodox looking but, completely legit. You would get the same effect
using a pair of (two from) inverters (7404 for example) cross coupling
them and putting a switch across the outputs to debounce the switch.
Bottom line is it worked for 30+ years and something else is broken.
Now one of the things I've seen with older TTL is inputs that are stuck
(likely ESD or other on die failure) to either Vcc or Ground. This could
be either the '174 or the gate/inverter they drive is failed this way.
I've
seen the logic diagrams for 74x74, 74x109, 74x112, etc and for
these it is clear (assuming the logic diagram is what the designers
really implemented) that the 'outputs' are really bidirectional, assuming
you want to override the internal FF output with a stronger external driver.
None of the databooks I have ever seen actually show the gate level logic
for the internals of the 74x175 or 74x174; they are only black box diagrams.
So it is not clear to me that the outputs are unbuffered/bidirectional.
They certainly seem to be for Signetics (see below) but my lab tests cannot
verify this for any other mfg.
I have pulled totem-pole outputs forcibly high or low before, but
have always used an external series current-limiting resistor to limit
the override current to a 'safe' value.
I've
replaced the top 74S175 device (originally a Signetics 74S175
date code 1970) with a socket, and have tried other 74x175 parts
but none work at all (NAT 74LS175 1983, TI 74AS175 1986, SIG 74S175
1984, TI 74175 1974). Even on the bench in a proto board I can't
get any of these devices to behave like the original. Yanking the
QB~ output to hard ground does not force the Q output high. So
was DEC relying on the aberrant behavior of a 1970 Signetics 74S175?
No, I've done this with TI, Signetics, National and others. I'm about
ready to rip out the two bogus '175s and replace them with
some other logic (three '00s if I calculate correctly).
Anybody have any other ideas on what to look for or at?
Check the down stream logic for stuck inputs. When I repaired my 8f
(1973 manufacture date) I had several gates with the inputs stuck
(the driving gate was ok) where the input was hard high or hard low
at the pin and it was the gate itself not driving logic at fault.
A milliampmeter confirmed one gate (7400) with pin 1 hard to VCC
(Iol was >100ma). Drove me nuts as the first part replaced was
a 7474 driving that gate with no fix!
I'd give the 7404 the hairy eyeball! A quick test is socket a '175
with the Q and /Q output pins floating and using a jumper to ground
make it flip [It WILL NOT IF MR/ is asserted, you can bend out the
MR/ pin to avoid that.]. Then test the '04 for input changes output.
Allison
6681
days inactive
6682
days old
1 comments
2 participants
participants (2)
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ajp166＠bellatlantic.net -
ak6dn＠mindspring.com