9 Jul
2006
9 Jul
'06
2:23 p.m.
Subject: Re: OMTI parallel port interface hack
From: ard at p850ug1.demon.co.uk (Tony Duell)
Date: Sun, 09 Jul 2006 21:20:12 +0100 (BST)
To: cctalk at classiccmp.org
The 6522 is sometimes nice but hard to find. and for many the 68721 is
even harder to find.
As someone said, 8255s, the roads paved with them. Also how often do
you have to turn a port around? Apps where I needed that I found that
there were other approaches that worked better.
The typical application of most 8255's, I'm going to guess is that they're
initialized at the start of an application or when the computer is booted
and the mode is never fiddled with thereafter.
As I mentioned in my reply to Allison, it's worse than that.
On reset, the line is an input, so a TTL input connected to it will treat
it as high (it would be good practice to add a pull-up resistor, sure)
On writing to the mode register, that TTL input will be forced low
Then you might make it high again.
Your external circuit has to be happy with this (it can't assume the line
will stay high as the chip is initialised). The other parallel chips
(e.g. 68721, 6522) don't have this problem, with those, you can write to
the output port register and make outputs effectively 1 _before_ writing
to the direction register. Then if you have an exetrnal pull-up, or
assume a TTL input floats high (naughty!), you will not get a momentary
low glitch on the line.
Does the 8251 USART also have some sort of strange initialization problem?
It's been a long time since I've used one, but I seem to recall a gotcha.
IIRC, it's impossible in gnneral to force it into a known state. If
you're setting it up for synchronous operation and forget how many of the
initialisation bytes you've sent it, there's no software way to force it
into a known state from where you can start the initialisation again (a
hardware reset will do it, of course).
-tony
10 Jul
10 Jul
11:41 a.m.
On 7/9/2006 at 5:23 PM Allison wrote:
If you forget how many init bytes you sent, your
software is broken
or Alzhimers. Also issuing a reset command after a data port read
works. The 8251/9551/2651 and related varients are all annoying
about that. In general I dislike chips that need to be pumped with a
string of bytes to one address for init. However most behave and it's
not that hard to sort out. However since most of the S100 crates I have
and many systems I've built 8251s are familiar and used as I still
have tubes of them. However it's not my first choice for Sync ops
though for async its fine.
Ah, I remember now. The 8251, after a power-up reset, is set to input two
mode words. However, if it's driven by an application that is unaware of
when the last system reset was done, is caught with a problem if it
attempts to program the chip with an "internal reset" command. IIRC, the
way out of this was to output a zero byte before the "Internal Reset"
command. The zero byte, if a mode word, set the 8251 into a sync mode; if
issued as a command, would set various handshaking lines. In either case,
the 8251 was ready to accept a real command byte, which then could be used
to set the mode.
One thing about the 8251 docs was the strange use of "high" and "low"
and
"one" and "zero". As in "high will force the RTS/ line to
zero". Very
confusing.
Cheers,
Chuck
2:20 p.m.
The 6522 is sometimes nice but hard to find. and for
many the 68721 is
even harder to find.
As someone said, 8255s, the roads paved with them. Also how often do
you have to turn a port around? Apps where I needed that I found that
there were other approaches that worked better.
A trivial example that I have done many times : You can bit-bang I2C
through a couple of port lines on a 6522 (or 6821), and all you have to
add is a couple of pull-up resistors. You can't do it with an 8255 so
easily (you need 2 ouputs, 2 inputs, and external buffers).
-tony
6740
days inactive
6741
days old
2 comments
3 participants
participants (3)
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ard＠p850ug1.demon.co.uk -
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