20 Nov
1997
20 Nov
'97
2:53 a.m.
<The main memory of the DEUCE was built form mercury delay lines of 1024
<bits, and the 1024 bit shift register chip had just become available.
<The connection was obvious and we spent hours discussing the rebuilding
<a TTL version of DEUCE, for which he still had the logic diagrams. Alas
<the project was never completed but I have dreams of doing it one day.
With current parts the Turing machine could almost be practical/useful as
it would be easy to provide enough memory to simulate a very long tape
and enough speed to transverse it quickly.
It's been a long time since I've looked at that machine.
<Take the idea even further : the technology exists today to build most
<if not all first generations machines on a single chip. Indeed I wonder
<if an FPGA might not be able to be reconfigurable to build many of these
In most cases yes. Some are quite simple when reduced a logical
description. The PDP-8 has seen this treatment many times using the 6100.
6120 and even gate-arrays.
Allison
20 Nov
20 Nov
7:08 a.m.
There's a Java applet that simulates the Turing machine... not to handsome, as
Applets go, but you can program it, etc. If you try hard enough, you've got
to get it right........ (There's always the afterlife...) And the truth is
that as far as memory is concerned, it always gets faster, cheaper and bigger,
within a few months, if not at the same time. Now, there are exceptions, such
as the South East Asia production cuts, but mostly, it's a strait line. As
for processors, I'm convienced that if you wanted to put your money into it,
you could get any amount of power you wanted (Well, there's the speed of
light) but we're talking barn, or even skyscraper size here.... you'ld need it
in the Arctic Circle (Or Antarctic Circle) to keep the thing cooled, and
you'ld need the Tropics to keep the thing warm enough to just "start up".
But anyway, yes, I do have only the most BASIC KNOWLEDGE of the actual
inner workings of a computer.... I pretty much started caring with the
invention of a ZIF socket for the mainstream (cheap) market... so I'm not
really an old hand at this, but it seems that there MUST be a way to make a
simple, efficent (I mean that you spend days, or weeks/months, not decades
building this), and size effective (As in my house, not my block) way to do
this... wouldn't it be neet if you could make a fairly complex AI program for
something like the Virtual Pet (Tomagatchi) (Same size).
Tim D. Hotze
PS- I've been looking for this for months. Does anyone know where I can find
the latest version of Elisa (Or another good AI) on the net? Elsewhere?
Allison J Parent wrote:
<The main memory of the DEUCE was built form
mercury delay lines of 1024
<bits, and the 1024 bit shift register chip had just become available.
<The connection was obvious and we spent hours discussing the rebuilding
<a TTL version of DEUCE, for which he still had the logic diagrams. Alas
<the project was never completed but I have dreams of doing it one day.
With current parts the Turing machine could almost be practical/useful as
it would be easy to provide enough memory to simulate a very long tape
and enough speed to transverse it quickly.
It's been a long time since I've looked at that machine.
<Take the idea even further : the technology exists today to build most
<if not all first generations machines on a single chip. Indeed I wonder
<if an FPGA might not be able to be reconfigurable to build many of these
In most cases yes. Some are quite simple when reduced a logical
description. The PDP-8 has seen this treatment many times using the 6100.
6120 and even gate-arrays.
Allison
9899
days inactive
9899
days old
1 comments
2 participants
participants (2)
-
allisonp＠world.std.com -
photze＠batelco.com.bh