On 2020-Oct-01, at 2:03 PM, Paul Koning via cctalk wrote:
On Oct 1,
2020, at 1:20 PM, dwight via cctech <cctech at classiccmp.org> wrote:
It is going to need a lot of contact cleaning.
The one thing I like is the carry design the Zuse used. Really fast for relays but not of
much use for solid state.
Dwight
Where did you find that? I looked through the document that was posted and I don't
see that detail in it.
On 2020-Oct-01, at 2:38 PM, Eric Smith via cctalk wrote:
Where is that circuit described?
Try a search for "zuse adder", although I haven't gone through the results
to see which one provides a 'good' explanation, but it looks like there are
explanations out there.
If I may, and in the following I hope I'm not conflating things, as it was some years
ago I looked at this stuff:
The idea is that a set of relays are energized in accordance with the state of the bits of
the two operands.
This can occur in parallel so is fast (one relay-unit-delay).
Contact logic of those relays produces the sum, carry and not-carry for each bit,
and the carries are wired sequentially through the contact logic of all bits.
There are no intervening relays, and no relay energization is dependant upon a preceding
relay in the bit sequence.
Thus the entire sum and final carry are available immediately (at electric speed) after
the one relay-unit-delay.
No mechanical-speed ripple carry.
If you try to do this with relays in a more 'obvious' manner you end up with a
mechanical ripple delay down the bits.
I'm not sure how unique this is to Zuse however.
The raw design presented in the Radio-Electronics/Edmund Berkeley Simon articles of
1949/50 presents this scheme,
although more complex (unoptimised) in the contact logic.
This is post-Zuse of course, but it's a question and investigation as to how the
design may have gotten from Zuse to the US/Berkeley in those years.
That is, I wonder if it's a design that was arrived at independently in multiple
places, or did it all derive from Zuse.
When I was figuring-out/recreating the design of 'Simon' some years ago, I
optimised the RE/Simon adder design down considerably.
That's written up here, in the ALU/adder section:
http://madrona.ca/e/simon/imp.html
The schematic there presents the idea.
Some years later I ran across the Zuse design and found I was one optimisation short of
Zuse
(IIRC, one more contact could be optimised out and it would match the Zuse design).
I've been long meaning to add the Zuse circuit into that page to present the further
optimisation.