22 Aug
2002
22 Aug
'02
3:34 p.m.
From: "Eric Smith" <eric(a)brouhaha.com>
Hi
The only issue with PMOS is on the outputs. They
may not pull down as hard as a TTL input pulls up.
This is generally fixed with a pull down resistor
and/or a diode to limit the negative travel. Some
TTL can tolerate some negative on the input, most
CMOS can't ( I think the 4049 can though ).
Dwight
Hmm, but then how is translation done on the
inputs to the ROM? It is
a TTL device feeding the address, so the 0-5v swing (0.5v to 4+v)
swing would appear to be an input swing of +15 to +20.
No translation required. PMOS thresholds are within a few volts of the
positive rail.
23 Aug
23 Aug
1:05 a.m.
At 01:33 PM 8/22/02 -0700, you wrote:
Ah, master, you are precisely right. The circuit pulls down with 6.8K to
the -V. Still, I'm surprised that 74xx inputs will take the output (I'm
assuming that the PMOS outputs ran rail to rail). There is a clamp diode
on the input of 74xx devices, but with a >10V difference, I'd expect either
the driver or receiving clamp diode to complain.
This is all just for my education -- the board does exactly that and I've
learned that empirical proof takes priority over my speculations.
-----
Jim Battle == frustum(a)pacbell.net
From:
"Eric Smith" <eric(a)brouhaha.com>
Hi
The only issue with PMOS is on the outputs. They
may not pull down as hard as a TTL input pulls up.
This is generally fixed with a pull down resistor
and/or a diode to limit the negative travel. Some
TTL can tolerate some negative on the input, most
CMOS can't ( I think the 4049 can though ).
Dwight Hmm, but then how is translation done on the
inputs to the ROM? It is
a TTL device feeding the address, so the 0-5v swing (0.5v to 4+v)
swing would appear to be an input swing of +15 to +20.
No translation required. PMOS thresholds are within a few volts of the
positive rail.
10:18 a.m.
On Thu, 22 Aug 2002, Jim Battle wrote:
At 01:33 PM 8/22/02 -0700, you wrote:
Ah, master, you are precisely right. The circuit pulls down with 6.8K to
the -V. Still, I'm surprised that 74xx inputs will take the output (I'm
assuming that the PMOS outputs ran rail to rail). There is a clamp diode
on the input of 74xx devices, but with a >10V difference, I'd expect either
the driver or receiving clamp diode to complain.
It is also possible the the PMOS outputs are open drain so the current
From:
"Eric Smith" <eric(a)brouhaha.com>
Hi
The only issue with PMOS is on the outputs. They
may not pull down as hard as a TTL input pulls up.
This is generally fixed with a pull down resistor
and/or a diode to limit the negative travel. Some
TTL can tolerate some negative on the input, most
CMOS can't ( I think the 4049 can though ).
Dwight Hmm, but then how is translation done on the
inputs to the ROM? It is
a TTL device feeding the address, so the 0-5v swing (0.5v to 4+v)
swing would appear to be an input swing of +15 to +20.
No translation required. PMOS thresholds are within a few volts of the
positive rail.
from the pulldown resistor is all that the clamp-diode
sees...
This is all just for my education -- the board does exactly that and I've
learned that empirical proof takes priority over my speculations.
-----
Jim Battle == frustum(a)pacbell.net
Peter Wallace
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