"Shoppa, Tim" <tshoppa at wmata.com>
wrote:
"Walter F.J. Mueller" <w.f.j.mueller
at gsi.de> wrote:
> Johnny Billquist <bqt at softjar.se>
wrote:
> > I wasn't aware that any prototypes ever were produced and came as
> > far as being functional. I thought it was just paper work that
> > had bee done.
>
> The 11/74 wasn't marketed, as pointed out in this thread, but a
> few systems were build by DEC. A picture of such 11/74 system
> was made available by Tim Shoppa, see
>
>
http://www.trailing-edge.com/~shoppa/1174Xopen.jpg
>
> You'll nicely see the four CPUs.
Yes, I know of these systems. However, that is
not an 11/74 on that
picture, but an 11/70mP. There is a difference...
As pointed out, the 11/70mP was marketed as an 11/74, but it's a
different CPU.
The easiest way to see that this is a picture of
an 11/70mP is by
looking at the lower rotary switch, which only have four positions,
and not eight (which the 11/74 have). So no CIS on this machine.
The only 11/74 picture I've seen so far is
the silk screen panel
picture posted a few days ago. Unfortunately I've already forgotten
the name (I'm lousy with names, sorry) of the person who posted it,
and who also worked on the 11/74 CIS microcode.
The machine on that picture is probably CASTOR::
by the way.
The people who work with/maintain CASTOR:: call it a 11/74, FWIW.
Yes, I know.
I'll reply to this one last time, and then I'll give up.
Don North reported that he had been a part of the team that had
written the CIS microcode for the 11/74 CPU.
I commented that I thought the 11/74 CPU had only been a paper product.
Don North also pointed out that marketing "stole" the 11/74 moniker
for the 11/70mP system.
Now, throughout this discussion, we need some way of separating what
we are talking about. DEC internal project papers seems like a good
start.
There we have the 11/70mP, which is a modified 11/70 with just the
addition of the ASRB cache bypass and memory interlock, as well as the
cache bypass bit in the PDR, and a cache bypass bit and flush control
in the cache control CSR.
The 11/74 is a total redesign of the 11/70 CPU, with the same
modifications as the 11/70mP, but also the addition of the CIS,
removal of one Massbus, and redesign of a whole bunch of CPU boards,
including removing one clock signal not used, and the addition of new
clock signals and control signals required by the CIS.
I'm only talking CPUs here, not systems.
Another way to name them would perhaps be:
KB11-B - Old 11/70 CPU with synch FPP.
KB11-C - New 11/70 CPU with asynch FPP.
KB11-CM - MP modified KB11-C
KB11-E(?) - The new 11/74 CPU with asynch FPP and CIS.
I seem to remember reading somewhere that the 11/74 CPU were to be
called KB11-E, but I also have this nagging feeling that KB11-E might
have been the 11/44, or possibly the 11/60.
Now, as I myself pointed out, RSX regards the 11/70mP as an 11/74, and
that is also what the CPU identification code in RSX calls it.
But if we call this an 11/74, what shall we call the 11/70 with CIS?
So, for the purpose of this thread, I decided to go with Don Norths
naming, and call the 11/70 modified for multiprocessor operations the
11/70mP. If you look at the picture on your site, Tim, you'll also
notice that the text on the front panel actually says something like
"PDP-11/74 MP". (Not sure about the /74, but you definitely see the
"MP" part. (
http://www.trailing-edge.com/~shoppa/1174Xopen.jpg)
Now, compare that to Don Norths picture of the 11/74 front panel:
http://www.ak6dn.com/stuff/1174.jpg.
They never used the term "11/70mP" in
front of me for sure. I would
occasionally elicit comments about multiprocessing on 73's or 93's
but it always came back to "our 11/74 does it THIS WAY" because that
was the working example.
I'm not disagreeing with you, Tim. I'm just trying to point out that
we have two different CPUs here, one of which I thought was never
made, but Don actually claims that it did exist, even if just as one
prototype.
The system was called an 11/74 everywhere, but for the purpose of this
discussion, we need to make a distinction between the CPUs.
I'm not saying that "11/70mP" is
wrong, indeed it's used in some of
the drawings and memos to describe what was commonly called the 11/74.
Yes.
CIS was real important to some DECcies circa late
70's for some Cobol
requirement but coming from the real-time side none of us ever cared.
We'd just run across machines that had this unneeded option.
Indeed. And the 11/70 don't have it, nor does the 11/74 systems that
ever were used.
CASTOR:: was 4 CPUs, by the way, while PHEANX:: was only 2, if I
remember right.
Johnny
I can't add too much to this regarding what parts and what DEC
designators applied
but here are memories of the time frame.
The first multiprocessor 11/70 was built with existing hardware and a few
wire wrap and jumper mods. Memory said there were 4 total, three inside DEC
and one at CMU that they hacked together possibly with DEC help. It
would evolve
to a design project to make that buildable as marketing felt they could
sell it.
However at the same time VAX/11/780 was real and also the various product
groups were feeling the effects of FCCs new class A and B limits for
RFI/EMI.
That and the high end market had been moving to more addressable memory
for bigger datasets and computationally wider data words as the tasks were
getting bigger. At that time the big calculations that were important were
atomic physics and weather models and both were associated with massive
[by that eras measure] datasets. In many respects the same pressures
repeated
themselves in the 32bit to 64bit evolution [Alpha].
It was my understanding that the 11/70 continued as a grandfathered
EMI and the new multiple cpu died due to EMI issues (plethora of cables
and multiple racks) and it was a faster number cruncher than VAX-11/780.
The VAX had higher potential as the new reigning super minicomputer. It
wasn't long after that I'd seen a VAX-11/782, 785 and VAXclusters.
There were several of the PDP11 flavors that would die or morph as a
result of manufacturing and serviceability issues.
Allison