SOme history that might come in handy - pbirkel at gmail.com March 8th, 2014, 11:37 PM The DEC PDP-11 Unibus Handbook identifies three standard ICs for use when connecting to Unibus lines: Bus Receiver - 8640 Quad NOR Bus Transceiver - 8641 Quad Bus Driver - 8861 Quad NAND It seems to be generally agreed that the 8861 driver/transmitter can be substituted by the 7439 Quad 2 Input NAND Buffer O.C. There seems to be no recognized physical substitute for the 8640, at least in part because it uses the 1 & 8 pins rather than 7 & 14 pins for GND/VCC, respectively (see Figure 1-25). Is that correct? What have folks been doing when needing to physically replace one of these -- substitute from a sacrificial module? For new designs, or rewiring old ones (dead-bug?), is there a generally agreed logical substitute for the 8640? Unibus handbook Figure 1-30 does specify the RC-equivalent input for this IC but I have not as yet tried to cross-walk it against well-known SN74xx-series chips. I imagine that I'm the umpteenth person to encounter this problem, so before I try to rediscover fire I'm hoping that someone else could share their torch of knowledge :->? On Sun, Oct 28, 2018 at 2:19 PM Camiel Vanderhoeven via cctalk <cctalk at classiccmp.org> wrote:

Thanks for the datasheet. I have to say I am not totally convinced that I have correctly identified the reset pin on the F11 because there seems to be a lot of logic behind it. This particular path I am pursuing now seems a bit more promising though. I have not checked the DC OK pin yet as I wasn't sure which one it was and I was hoping my tracing would take me back to the PSU, but I haven't reached it yet. I suppose I have been assuming that the LED means it is OK, but perhaps it isn't. Hopefully this 8640 will take me closer. When you say it is pin 1 on the connector, which side are you counting from? Thanks Rob

Knowing the 8640 pinout now I was able to trace one of its inputs to the PSU connector, which appears to confirm that DC OK is next to the polarising pin. I can now confirm that DC OK is stable. It seems from my reverse engineering of the schematic that this allows other signals to control the reset state of the F11, but these other signals appear to be driven by clock signals, which is rather confusing at the moment.