23 Jun
2007
23 Jun
'07
12:05 p.m.
The CDC 6000 series used a 10 way multithreaded
architecture
virtualized as 10 independent 12-bit processors for I/O. No
interrupts necessary there either. But then, back in 1964, I don't
know if the word "multithreaded" had been invented yet.
This also apparently appears in the Honeywell 1800. Need to dig out
info on that. I knew the TX-2 and Xerox Alto implemented multiple
hardware contexts. I'm pretty sure Mark Smotherman covers this on
his site, which Brad mentioned a day or two ago.
24 Jun
24 Jun
4:38 a.m.
Al Kossow wrote:
I believe the Symbolics 3600 has support for multiple tasks in hardware
at the microcode level. Unfortunately internals of the 3600 are hard to
come by, but I keep digging.
(I found someone the other day who worked on a "lisp risc machine" FPGA at
Symbolics. He says he may have some tapes... :-)
-brad
The CDC 6000
series used a 10 way multithreaded architecture
virtualized as 10 independent 12-bit processors for I/O. No
interrupts necessary there either. But then, back in 1964, I don't
know if the word "multithreaded" had been invented yet.
This also apparently appears in the Honeywell 1800. Need to dig out
info on that. I knew the TX-2 and Xerox Alto implemented multiple
hardware contexts. I'm pretty sure Mark Smotherman covers this on
his site, which Brad mentioned a day or two ago.
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