Hi, I have written a PDP-8 VHDL model and I have it running in an FPGA https://github.com/scottlbaker/PDP8-SOC At this time it has passed a basic DEC diagnostic instruction test but I found some interesting things when getting that instruction test to pass. For example: The following segment of code implies that IAC instruction affects the Link bit 1797 /GROUP 1 OPERATE TEST 33 1798 02626 7300 CLA CLL /AC=0000 LINK=0 1799 02627 1053 TAD K2525 /AC=2525 1800 02630 7261 CLA CMA CML IAC /TEST COMBINATION 1801 02631 7420 SNL 1802 02632 7430 SZL 1803 02633 7402 HLT /CLA CMA CML IAC FAILED, AC SHOULD 1804 /BE 0000, LINK SHOULD BE ZERO but the PDP-8 Handbook ; DEC copyright 1966; page 14 says nothing about the Link bit being affected by the IAC instruction. The simh PDP-8 simulator also shows that L is affected by IAC. If I change this test line from 1800 02630 7261 CLA CMA CML IAC /TEST COMBINATION << link=0 to: 1800 02630 7261 CLA CMA CML /TEST COMBINATION << link=1 Can anyone point me to: 1) DEC documentation which more fully describes all the instruction set (in more detail than the PDP-8 handbook) 2) Some more instruction tests in assembler source code format. I have found lots of binary files but I would prefer assembler source code format. I am using a pal compatible cross assembler. Thanks and Regards, Scott

Hi, I have written a PDP-8 VHDL model and I have it running in an FPGA https://github.com/scottlbaker/PDP8-SOC