24 Sep
2004
24 Sep
'04
8:19 a.m.
From: "Ade Vickers"
<avickers(a)solutionengineers.com>
At 22:50 23/09/2004, you wrote:
Hi Ade
I think your counts are way off. As I recall, I did a schematic
a while back for a single bit of an alu and it only took about
4 or 5 relays. I did use DC and diodes for steering.
The only thing you need a relay for is to invert. All AND and
OR functions can be done with the contacts of the relays. Even
the diodes are not needed if you have enough contacts.
The life time of the relays are for maximum current conditions.
A relay computer would not be running quite to that level.
Also, relay coils can run at lower currents and voltage once pulled
in. The clocking circuits can be built to provide a pulse of
high voltage to pull the relays in and then a reduced holding
current to maintain.
I still consider building a relay computer as a practical project
but like Karl Zuse, I think that memory is still the biggest issue.
Unlike normal silicon, single relays can be used to buffer both
inverting or non-inverting. This means that a single relay can be
used as a storage element. Silicon requires the use of two inverters
for a static memory.
I've thought about an array of reed switches for memory with
bias magnets. These would be adjusted such that there would
be just enough magentic field to hold the reed closed once closed
but not enough to cause it to close by itself. The coils would
then be used to open and close by applying a counter or aiding
field to the reed/magnet. The magents would be arrange with alternating
directions such that there was no accumulating of the magentic
field across the array of the reed RAM. ROM can be done with
and array of diodes and switches.
I'd keep the ALU simple since most times, it doesn't need to
do arithmatic. A single bit ALU with a few serial storage
shift registers would be sufficient for most math operations.
Dwight
On Wed, 2004-09-22 at 11:17 -0700, Vintage
Computer Festival wrote:
I did some back-of-a-fag-packet calculations (i.e. they might be completely
& utterly wrong, in which case I'd appreciate corrections) on a relay
computer...
Assume you want a Z80-type CPU. This has ~8k gates. Typically, it seems to
take 1 relay per input to implement any given gate. Now, I don't know how
many "x-input" gates there are in a Z80, so I'll assume that - on average -
it will require 3 relays/gate. Thus, we need ~24,000 relays to implement
the Z80.
If each relay needs, say, 25mA @ 6v to operate, then the peak current draw
of our R80 (as I shall call it) could be around 600A (I think). And that's
before we've added memory, i/o, etc.
As for the heat/noise - well, IMHO it's worth building it just to
experience that! Mind you, you'll need a lot of room: If you use 30mm by
13mm relays, then the board space you need is at least 9.36 square
metres... Still, if you assume that each board needs approx 40mm of space
incl. airflow room, then you should be able to fit the R80 into 2 400mm by
400mm by 2000mm cabinets (internal w/d/h)...
The relays I've been looking at typically quote around 25ms to operate
(either way), so I don't see how you could clock the R80 at anything faster
than around 40Hz; and you'd probably want to drop to 20Hz to be on the safe
side. The same relays quote a typical lifetime of 10e7 operations; so at
20Hz, your R80 should last a little under 139 continuous hours of operation
before relays started failing...
Creating a screen driver should be interesting....
Question: Wouldn't it be easier to implement an OR gate with no relays at
all (just two wires joining together)? Or would you need to use the relays
to keep the output voltage/amperage regulated?
Additional: Hunting around for a suitable CPU to implement in relays, I
came across the P8 CPU design (http://www.rexfisher.com/P8/P8_TOC.htm).
This uses a 74LS181 4-bit ALU, which I reckon would require 149 relays to
replicate. The only thing that confuzzles me is: what use, exactly, is a
1-input AND? Several of these appear on the 74LS181 schematic...
Cheers,
Ade. On Wed, 22 Sep 2004, Jules Richardson wrote:
Amazing, huh? If I read that right, it's 52 relays though (I don't know
any German) which makes it sound rather like a 'simple' relay control
system rather than an actual relay computer. I fired off an email to
them to see if they'll let me have a nose at the wiring diagrams. Apologies if someone's mentioned this one
before. Quite possibly the
coolest gadget I've seen in a long time, though:
http://www.cyberniklas.de/pongmechanik/indexen.html
Awesome. It would be great to get stuff like this exhibited at the VCF.
The web page is pretty smart also. What terrific technical and design
work. 
24 Sep
24 Sep
9:39 a.m.
On Fri, 24 Sep 2004, Dwight K. Elvey wrote:
I also think that these relay counts are a bit excessive. We are
forgetting the huge amount of wisdom available on relay logic design,
starting mainly with AT&T and the Bell System, and many other authors who
wrote on this subect from the 20s thru the 60s. There are several
branches of mathematics and combinatorial logic devoted to the analysis
and optimization of relay logic systems - which of course is being rapidly
forgotten today for obvious reasons.
That makes these books cheap / free :
Engineer's Relay Handbook, various authors (Hayden)
Switching Circuits and Logical Design, Caldwell (Wiley)
Design of Switching Systems, Ritchie* (Bell System)
and those are just the three cluttering up my desk - there are probably 10
more on the shelves.
Point being - the design of a modern Relay Computer must start with the
Boolean design and equations, to which are then applied the well-known and
well-documented principles of Optimization as they concern
electro-mechanical logic. Then the practical (also well-documented)
aspects of: speed, timing, current draw, contact protection, etc. Layout
and wiring optimization come next... not the least being: when it breaks,
can you find it and fix it?
Cheers
John
Note: This book is by the "C" language author's Father....
From:
"Ade Vickers" <avickers(a)solutionengineers.com>
At 22:50 23/09/2004, you wrote:
Cheers,
Ade.
Hi Ade
I think your counts are way off. As I recall, I did a schematic
a while back for a single bit of an alu and it only took about
4 or 5 relays. I did use DC and diodes for steering. 
9:48 a.m.
Dwight K. Elvey wrote:
I've thought about an array of reed switches for
memory with
bias magnets. These would be adjusted such that there would
be just enough magentic field to hold the reed closed once closed
but not enough to cause it to close by itself. The coils would
then be used to open and close by applying a counter or aiding
field to the reed/magnet. The magents would be arrange with alternating
directions such that there was no accumulating of the magentic
field across the array of the reed RAM. ROM can be done with
and array of diodes and switches.
Why not just use a very large core memory instead and sence the
output with a very sensitive relay?
I'd keep the ALU simple since most times, it
doesn't need to
do arithmatic. A single bit ALU with a few serial storage
shift registers would be sufficient for most math operations.
You hope, homebrew CPU's have a way of growing on you. :)
9:51 a.m.
Dwight K. Elvey wrote:
I've thought about an array of reed switches for
memory with
bias magnets. These would be adjusted such that there would
be just enough magentic field to hold the reed closed once closed
but not enough to cause it to close by itself. The coils would
then be used to open and close by applying a counter or aiding
field to the reed/magnet. The magents would be arrange with alternating
directions such that there was no accumulating of the magentic
field across the array of the reed RAM. ROM can be done with
and array of diodes and switches.
Why not just use a very large core memory instead and sence the
output with a very sensitive relay?
I'd keep the ALU simple since most times, it
doesn't need to
do arithmatic. A single bit ALU with a few serial storage
shift registers would be sufficient for most math operations.
You hope, homebrew CPU's have a way of growing on you. :)
Also so does memory. :)
7237
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7237
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bfranchuk＠jetnet.ab.ca -
dwight.elvey＠amd.com -
jpl15＠panix.com