24 Nov
2006
24 Nov
'06
6:24 a.m.
Gordon JC Pearce <gordon at gjcp.net> skrev:
The thought occurred to me that it might be nice to have the
floating-point option in my PDP-11/73. Since I haven't got one, and
don't fancy paying the $500 or so that some online sellers seem to be
asking (do they really expect to sell *any*, never mind at that price?),
I was wondering how easy it would be to implement in an FPGA as was
discussed at length earlier in the week.
Feasible, or a complete waste of time? Presumably I'd need software
written to make use of the floating-point hardware anyway...
Gordon.
Can't really answer your primary question, but to fill in some
information for you, the FPA for the J11 is an *accelerator* (hence FPA,
and not FPP). It will not add any instructions to the CPU. The J11
already implements all the instructions of the FP11. What the FPA do is
speed them up.
And software wise, there is plenty of software that uses the FP11
instructions. Mostly high level languages, though.
Johnny
24 Nov
24 Nov
8:33 a.m.
On Nov 24, 2006, at 9:24 AM, Johnny Billquist wrote:
I'm pretty sure the FPJ11 is a hardware implementation of the base
J11's microcoded FP instructions, is that correct? Meaning, the
instruction stream can contain FP instructions which will either be
executed slowly by microcode in the J11 or quickly by hardware in the
FPJ11?
I finally managed to get my hands on an FPJ11 a few months ago; I
picked up an 11/83 board which had one installed. Unfortunately,
RSTS/E complained upon boot that it was a down-rev chip and refused
to use it. That kinda pissed me off. :-(
As an interesting aside, I read somewhere (possibly here) that the
internals of the FPJ11 were recycled to form the basis of the
MicroVAX-II chipset's FPU.
-Dave
--
Dave McGuire
Cape Coral, FL
The thought
occurred to me that it might be nice to have the
floating-point option in my PDP-11/73. Since I haven't got one,
and don't fancy paying the $500 or so that some online sellers
seem to be asking (do they really expect to sell *any*, never mind
at that price?), I was wondering how easy it would be to implement
in an FPGA as was discussed at length earlier in the week.
Feasible, or a complete waste of time? Presumably I'd need
software written to make use of the floating-point hardware anyway...
Gordon.
Can't really answer your primary question, but to fill in some
information for you, the FPA for the J11 is an *accelerator* (hence
FPA, and not FPP). It will not add any instructions to the CPU. The
J11 already implements all the instructions of the FP11. What the
FPA do is speed them up.
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