Who said anything about partial decodes? What I was suggesting was to AND the top 100 address lines (if you can make a CPU clocking at 1GHz, then you can make a 100 input AND gate). That gives you an 'I/O page selected' signal, which can be system-wide. Now decode the bottom 28 address lines fully, AND with the I/O page selected signal, and use the result as the chip select signal for an I/O chip. That's fully decoded. The I/O is in its own page at the top of memory (like on a PDP11, where it works very well), and you can use the same instructions to access memory and I/O. -tony