19 Dec
2001
19 Dec
'01
12:46 p.m.
Ben Franchuk <bfranchuk(a)jetnet.ab.ca>ca>:
> what is the faster CPU -- A 6502 or Z80 style processor like
> the rabbit.
Depends...
For the same instruction execution rate (ignores clocks and cycles)
the z80 is likely faster. However... if you have a 20mhz 6502 and
a 10mhz z80 it gets muddier with the 6502 being the faster. And
if you know one better than the other you can certainly exploit it
all the more. In the end it's not which one does a task faster, it's
what one you can code the task for faster.
Sorta like asking apples or oranges.
Allison
19 Dec
19 Dec
9:57 p.m.
If you run a 20 MHz Z80 against a 20 MHz 6502, you'll find the 6502 performs WAY
(3x-5x) faster than the Z80. It's difficult to base a comparison on clock rate
alone. All 6502 memory cycles take 1 clock tick. Z80 memory cycles, aside from
M1, take 3 clock ticks, with no wait states in use. If you run the 6502 at a
rate that fully utilizes the memory bandwidth at a rate such that the Z80 can
perform an M1 in the same amount of time, without wait states, the 6502 will
always be faster, because it's running faster. The Z80 uses 1-1/2 clock ticks
to execute its instruction fetch. If that's to be memory access window for each
processor, and you run them both from static memory, and you allow minimal
recovery time, e.g. use 10-15 ns memory, (just for the comparison) then you can
use a 20 MHz Z80 and a 20 (actually 14) MHz 6502, and clock the 6502 with a 25ns
low, 75ns high clock, and drive the Z80 with a square 20 MHz. That will be a 10
MHz clock for the 6502 and a 20 MHz clock for the Z80. I'd submit that the 6502
will still run rings around the Z80, since it is still going to be cycling
memory at an average of 200 ns per cycle, while the 6502 does it a 100 ns rate.
Surely a better comparison can be arranged.
Dick
----- Original Message -----
From: "ajp166" <ajp166(a)bellatlantic.net>
To: <classiccmp(a)classiccmp.org>
Sent: Wednesday, December 19, 2001 4:46 PM
Subject: Re: MITS 2SIO serial chip?
Ben Franchuk
<bfranchuk(a)jetnet.ab.ca>ca>:
> what is the faster CPU -- A 6502 or Z80 style processor like
> the rabbit.
Depends...
For the same instruction execution rate (ignores clocks and cycles)
the z80 is likely faster. However... if you have a 20mhz 6502 and
a 10mhz z80 it gets muddier with the 6502 being the faster. And
if you know one better than the other you can certainly exploit it
all the more. In the end it's not which one does a task faster, it's
what one you can code the task for faster.
Sorta like asking apples or oranges.
Allison
4:18 p.m.
Richard Erlacher wrote:
If you run a 20 MHz Z80 against a 20 MHz 6502, you'll find the 6502 performs WAY
(3x-5x) faster than the Z80. It's difficult to base a comparison on clock rate
alone. All 6502 memory cycles take 1 clock tick. Z80 memory cycles, aside from
M1, take 3 clock ticks, with no wait states in use. If you run the 6502 at a
rate that fully utilizes the memory bandwidth at a rate such that the Z80 can
perform an M1 in the same amount of time, without wait states, the 6502 will
always be faster, because it's running faster. The Z80 uses 1-1/2 clock ticks
to execute its instruction fetch. If that's to be memory access window for each
processor, and you run them both from static memory, and you allow minimal
recovery time, e.g. use 10-15 ns memory, (just for the comparison) then you can
use a 20 MHz Z80 and a 20 (actually 14) MHz 6502, and clock the 6502 with a 25ns
low, 75ns high clock, and drive the Z80 with a square 20 MHz. That will be a 10
MHz clock for the 6502 and a 20 MHz clock for the Z80. I'd submit that the 6502
will still run rings around the Z80, since it is still going to be cycling
memory at an average of 200 ns per cycle, while the 6502 does it a 100 ns rate.
What happens if you look at the M1 cycle as 2 Z80 memory cycles (2 wait
states).
Now memory speed is the same for both but not the clock rate.
--
Ben Franchuk --- Pre-historic Cpu's --
www.jetnet.ab.ca/users/bfranchuk/index.html
20 Dec
20 Dec
5:24 a.m.
What happens if you look at the M1 cycle as 2 Z80
memory cycles (2 wait
states). Now memory speed is the same for both but not the clock rate.
But even with this artificial concept, the 6502 is still running through
instructions in fewer average clock cycles. Granted, the Z80 has a good
selection of more complex instructions that take fewer clock cycles than
the equivalent 6502 code in total. How often they get employed for this
advantage, however, directly affects their run-time impact of course.
--
----------------------------- personal page: http://www.armory.com/~spectre/ --
Cameron Kaiser, Point Loma Nazarene University * ckaiser(a)stockholm.ptloma.edu
-- In memory of Douglas Adams -------------------------------------------------
19 Dec
19 Dec
5:18 p.m.
Cameron Kaiser wrote:
But even with this artificial concept, the 6502 is still running through
instructions in fewer average clock cycles. Granted, the Z80 has a good
selection of more complex instructions that take fewer clock cycles than
the equivalent 6502 code in total. How often they get employed for this
advantage, however, directly affects their run-time impact of course.
One real problem with the Z80 is that a there is a lot of
unused/undefined
instructions because of the complex instruction set, that have been
decoded
and used in software. This has a impact if you are not using a real chip
but a emulator of some sort.
--
Ben Franchuk --- Pre-historic Cpu's --
www.jetnet.ab.ca/users/bfranchuk/index.html
20 Dec
20 Dec
6:52 a.m.
Cameron Kaiser wrote:
Actually, for that matter, the NMOS 6502 suffers from this as well.
There is a collection of valid opcodes that seem to work on the majority
of NMOS 6502s and derivatives (virtually all Commodore 8-bits, for
example, except the C65). These were replaced by new and documented
opcodes in CMOS versions of the 6502, and the 65816. Most Commodore
emulators worth their salt support these undocumented opcodes. They are
useful sometimes for combining two operations in a shorter-executing
single operation, but they were mostly used to obfuscate loaders instead
which won't work on SuperCPUs or other accelerated C64s.
--
----------------------------- personal page: http://www.armory.com/~spectre/ --
Cameron Kaiser, Point Loma Nazarene University * ckaiser(a)stockholm.ptloma.edu
-- Quote me as saying I was misquoted. -- Groucho Marx ------------------------
But even with this artificial concept, the 6502 is still running through
instructions in fewer average clock cycles. Granted, the Z80 has a good
selection of more complex instructions that take fewer clock cycles than
the equivalent 6502 code in total. How often they get employed for this
advantage, however, directly affects their run-time impact of course.
One real problem with the Z80 is that a there is a lot of
unused/undefined
instructions because of the complex instruction set, that have been
decoded
and used in software. This has a impact if you are not using a real chip
but a emulator of some sort.
6:40 p.m.
----- Original Message -----
From: "Ben Franchuk" <bfranchuk(a)jetnet.ab.ca>
To: <classiccmp(a)classiccmp.org>
Sent: Wednesday, December 19, 2001 8:18 PM
Subject: Re: MITS 2SIO serial chip?
Richard Erlacher wrote:
>
> If you run a 20 MHz Z80 against a 20 MHz 6502, you'll find the 6502 performs
WAY
<snip>
> memory at an average of 200 ns per cycle, while
the 6502 does it a 100 ns
rate.
What happens if you look at the M1 cycle as 2 Z80 memory cycles (2 wait
states).
It's not two memory cycles, is it? How are you interpreting that?
There are
TWO problems with it, where fairness to the Z80 is concerned. (1) the M1 is a
very short cycle that occurs somewhat infrequently, and (2) it carries with it
as baggage, the refresh cycle which tme is required to decode the opcode once
it's fetched. This makes the process longer than the normal memory reference
cycle.
If you want a realistic comparison between the to CPU's you have to decide
whether you want to incorporate the benefit of the refresh cycle into the mix,
since it is irrelevant with SRAMs. If, however, you want to incorporate that
refresh cycle as a benefit with some cost, rather than just a cost, then you
have to make decisions as though you were using DRAMs. DRAMs have a cycle time
and an access time. Back in the days of the Z80 and 6502, the shortest cycle
times were on the order of 375 ns. That means that you'd have to have a way to
stretch (ostensibly with wait-states) the M1 to a >375 ns length and
subsequently stretch the REFRESH cycle to that length as well, prior to
executing the next memory reference cycle. There are numerous imaginative ways
to do that, however, and they should be taken into account. Likewise, the same
upper limit on CPU cycle length should be imposed if you're going to compare
with the 6502. A 375 ns cycle length for the 6502 simply means 2.66 MHz clock
rate. If you insert two waits for the Z80's M1, and stretch the clock to force
a >375 NS cycle for refresh, and then pick a clock that will also hit that mark
with a standard unmodified memory reference cycle, you'll be running the Z80 at
~6 MHz
Now memory speed is the same for both but the clock
rateis not.
This is quite incomplete, in terms of levelling the playing field, but it is a
step in that direction.
Dick
--
Ben Franchuk --- Pre-historic Cpu's --
www.jetnet.ab.ca/users/bfranchuk/index.html
8323
days inactive
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6 comments
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participants (4)
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ajp166＠bellatlantic.net -
bfranchuk＠jetnet.ab.ca -
edick＠idcomm.com -
spectre＠stockholm.ptloma.edu