On Mon, May 04, 2015 at 01:54:10PM -0400, Noel Chiappa wrote:
Or maybe actually DMA indeed _doesn't_ work with
the CPU stopped, and what
happened was that the DMA request was waiting in the card, and as soon as the
processor started, it did the DMA? But how did the first instruction fetch
produce a valid instruction? Unless the first DMA cycle (to 01000) happened
before the processor fetched the first instruction?
Ow my head! I'm probably insane, but I have a hazy feeling that
arbitrating DMA while halted might be CPU-model-dependent thing? Also,
different models can have different definitions of "halted". The Q-bus
CPUs have uODT so they're mostly alive even when they aren't. The older
models might be different -- not that it would matter if you're using one
with a ROM console emulator (so it's not halted at all when you're typing
"L 172150" etc.), but I wouldn't know what to expect with a lights 'n
switches console with the "HALT" switch flipped. Then again, I also
don't know whether the DMA arbitration is usually done in microcode
or by external hardware.
John Wilson
D Bit