Early 3.5" Floppy Drives - test-drb@ccmp.vtda.org

15 Dec 2005

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Subject: RE: Early 3.5" Floppy Drives
   From: "Chuck Guzis" <cclist at sydex.com>
   Date: Thu, 15 Dec 2005 11:30:29 -0800
     To: cctalk at classiccmp.org

On 12/15/2005 at 1:18 PM Allison wrote:

 ;) your assumption is double density.  8"
SSSD is not that fast.
I never said formats were the same or even dive interface only that
the data rates fly. 
Nope.  I'm just going by the 765 data sheet:

"Pin 19 - CLK - Single-phase 8 MHz (or 4 MHz for mini-floppies) squarewave
clock"

IOW, if you supported 3.5  DD (or SD) floppies, you weren't going to be
able to do an A1 8" floppy without changing the clock. 
;)  You know not the part you speak of.  Question, what it that clock used 
for?  Hint data rates are NOT tied to it.  

The internal timers (HLT, HST, SR) are.  So if you need real fast or real 
slow step rates the chip clock is important. 

You have to read the apnotes and there was a users manaual at one time.
there are many things that if you apply WD177x or 179x rules to will not 
make sense.  Such as the use of TC.

...
 Same thing obtains for the WD 179x - "Pin 24 -
CLOCK - This input requires
a free-running 50% duty cycle square wave clock for internal timing
reference.  2 MHz +/- 1% for 8" drives, 1 MHz +/- 1% for mini-floppies." 
Not even close 765 is a wholly differnt animal.  The Read operation needs 
RDW and the write must have WC.  Both are independent of the chipclock.

(note: the 37C65 and later parts integrate a lot of logic that was
 external to 765 but logically still are. so their behavour is rule driven.)

...
 The 279x has a clock divider that's programmed by
pin 17 (5/8). 
Again differnt animal and based on 179x.

...
 Look at the grandaddy of the 8" XT drive
controllers, the CompatiCard I.
It uses port 7F2H to change the 765 clock from 4 to 8 MHz for 8" support.
MFM/FM doesn't enter into the equation--that's programmed into the read and
write commands and the data separator. 
Nope.

...
 But an old XT-era 720K 3.5"/5.25" controller
couldn't do this
clock-switching trick unless it could also support 1.2/1.44 media. 
Nope not needed.

The serial logic of the 765 is decoupled from the control and status 
logic.  If you used 4mhz for chipclock and did 8" your fastest step rate
would be half as fast as if you  used 8mhz.  Same you be true for Head load
time and head unload time.  Also when he chip is idle (not seen on PC hardware)
it scans all four drives for "Ready and Disk Change", the scan rate for that 
would also be off by /2.

Allison