20 Dec
2001
20 Dec
'01
7:55 a.m.
Z80 uses it's time differently... Then again how many instuctions
would it take to do a 16bit add (result in register or convenient place).
The fact that both are still viable suggests they have adaquate
speed and a rich enough instruction set to do many tasks.
Last item, z80, Z180 and Z280 do not have the same timing.
For example the Z280 can be run at a bus speed slower than
the CPU speed and with the MMU and cache running in burst
mode you get a very different bus utilization model.
Generally the only things that count is:
Can the cpu do the task?
What cpu are you familiar with?
What is the total cost to implement the task (firmware/software counts)?
Politcial impacts (company prefers, owns, has, used before).
Do I think z80 is better than 6502? Yes, I'm biased. Is 6502 a good cpu?
I think so, it certainly beat the 6800 and a lot of others in the 8bit
space.
Would I design with it? No, lack of experience, no on hand software base
for it, limited tools to work with it. Would I consider it, likely.
I have 6502, 6800, 1802, SC/MP, SC/MPII, ti9900, 8048/9/874x, 8080,
8085, z80, Z180 Z280, 6809 and T-11 to pick from. For a new design
(personal) of some size say to run an OS then Z280 or T-11 for single chip
I have 8748, 8749 and 8751s around. For simple controllers 8085 is easy
to use if it grows out of the 8749. Then again I also have upd78pg11s too.
Allison
-----Original Message-----
From: Richard Erlacher <edick(a)idcomm.com>
To: classiccmp(a)classiccmp.org <classiccmp(a)classiccmp.org>
Date: Thursday, December 20, 2001 4:17 AM
Subject: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
I've been on both sides of this question on a
number of occasions and I've
found
that the real challenge is to figure out what defines a
level playing field
for
such a comparison. I once concluded that running each
processor at a rate
amenable with the same memory bandwidth was appropriate, but there are a
number
of quesitons, still that have to be resolved.
(1) the 6502 is designed in a way that lends itself very well to shared use
of
its memory, i.e. using the memory for the CPU during
phase-2 and letting a
memory-mapped video refresh circuit have it during phase-1. That's quite
reasonable and impacts the 6502 very little, but, if you try to do the same
thing with a Z80, you get tangled up with its variable cycle lengths pretty
quickly.
(2) the Z80 demands a pretty short cycle for its instruction fetch (M1)
cycle,
and, if that's to be the rate-determining step for
the cmparison, i.e. if
the
memory bandwidth requirement is determined on that
basis, (no wait-states
allowed) then the 6502 will eat it alive. That, of course, is because 50%
of
its memory bandwidth will be frittered away due to the
fact that the M1
cycle is
short and has a wasted tail end (refresh cycle) while
the 6502 doesn't have
that
burden. Further, if that determines the memory
bandwidth, then the M1
cycle
(~400 ns with 200ns memory of the era) means that a 4
MHz CPU wouldn't be
able
to run with it.
Fairness might demand a wait state, but that would then raise the question
of
what's the bus bandwidth at which the 6502 will be
run (assume a 20 MHz
6502 and
a 20 MHz Z80, but use memory of their own era.) Also,
the refresh cycle
itself
is a mite short for what the CPU does at 4 MHz. How
would one stretch it
to
where it wouldn't impinge on the next memory cycle?
If you have to share
the
memory bus of the 6502, why not the Z80 as well? If
you can use timing
tricks,
why not on the 6502? I'd say use whatever timing
tricks the two CPU's can
live
with, but run them to their best advantage. Run
phase-1 on the 65-2 for
only 25
ns, then switch to phase-2 for whatever time the Z80
uses the memory. Let
the
Z80 use a wait or two in the M1, and stretch the
refresh so the cycle can
be
complete when the next cycle is in progress. Since
non-M1 memory cycles
are 3
clock ticks, the clock could be pretty fast,
couldn't it?
(Can you see how this gets tangled up in technical problems of fair
comparison?
That's BEFORE the question of what sort of
benchmark software is to be used
comes up.)
The shortest 6502 instructions take two clock ticks, but some overlap the
next
instruction fetch. The shortest Z80 instructions take
an M1 cycle,
followed by
refresh, to fetch, and I'm not sure whether they
execute during the refresh
(they're internal, so that's conceivable) or whether they produce an idle
bus
cycle. I also don't know what happens during that
idle bus cycle. Simply
sitting down and calculating the relative instruction timing might not be
so
easy. It certainly won't be easy to get right.
My own experience has been that in controller applications, manipulation of
16-bit values doesn't come up as often as I once believed. Mostly it seems
the
values that are dealt with are 8 bits or fewer. Others
may see this
differently, however.
Dick
----- Original Message -----
From: "Greg Ewing" <greg(a)cosc.canterbury.ac.nz>
To: <classiccmp(a)classiccmp.org>
Sent: Wednesday, December 19, 2001 3:30 PM
Subject: Re: MITS 2SIO serial chip?
> Ben Franchuk <bfranchuk(a)jetnet.ab.ca>ca>:
>
> > what is the faster CPU -- A 6502 or Z80 style processor like
> > the rabbit.
>
> Back when I used to spend long blissful evenings hand-assembling Z80
> programs [1] I got the impression that Z80 code was more compact than
> 6502 code, being able to manipulate 16-bit values with single
> instructions in many cases. Whether it was actually faster I don't
> know, but I suspect it was, as long as you stuck to the 8080-like core
> instructions which didn't take ridiculous numbers of cycles to
> execute.
>
> [1] I didn't do it in a storage locker, although I did often
> had the heater on in winter.
>
> Greg Ewing, Computer Science Dept,
+--------------------------------------+
University of
Canterbury, | A citizen of NewZealandCorp, a |
Christchurch, New Zealand | wholly-owned subsidiary of USA Inc. |
greg(a)cosc.canterbury.ac.nz +--------------------------------------+
20 Dec
20 Dec
10:42 a.m.
There are lots of things that you could compare, but the first things you've got
to leave out are the ones that aren't a Z80, which immediately deletes the Z180,
and Z280. The Z80 is not around any more than the 6502 is around. There are
derivatives of the 6502 still in production, but they are few. There are
derivative of the Z80 being produced as well. None of the former are 6502's,
and none of the latter are Z80's.
Your're right, in that they use their time differently. Because of the vast
architectural differences, one has to be cautious about chosing a comparison.
The first basis, before chosing a set of instructions for a comparision,
however, is selection of an appropriate timebase. The Z80 uses its clock
differently than the 6502 does. The Z80 never uses fewer than 2 clock ticks for
a complete memory cycle, ant 2 ticks is only the lenght of the M1 cycle. That's
followed by the refresh cycle, during which, if I understand the process
correctly, the Z80 decodes that opcode. "Normal" memory cycles are three
clock-ticks in length, though only thwo of them are actually used during the
actual access of memory. The memory access portion of the M1 cycle is
essentially a
The 6502 uses one clock tick for each CPU cycle. External hardware determines
how long the memory access is, though the period beginning with valid addresses
and read/write begins just under half-way into phase-1 and continues throughout
phase-2, each of which is actually more-or-less half a clock cycle long. If you
don't attempt to do transparent memory sharing along the phase-1/phase-2
boundary, a memory cycle can be as long as 1-1/2 clock ticks.
All of these constraints are based on the addition of no wait-states. The Z80
has excellent support for wait-state insertion during any cycle other than the
refresh cycle. The early NMOS 6502 supports wait state insertion on read cycles
only. There are ways of getting around this, but the Z80 certainly makes it
easier than does the 6502. CMOS 6502's support wait states on both read and
write cycles.
If you run each of the two at a rate that allows each to use its shortest memory
cycle as the basic access window to memory, the 6502 will probably outperform
the Z80 in a task that operates on 8-bit data in an 8-bit way. The more 16 or
32-bit things you do, the more it favors the Z80, due to its inherent features
such as the 16-bit registers and operatons on them without intervening
instruction fetches.
If you compare the rate at which they operate, however, the 6502 has features
that enable it to do 16-bit things quite handily in memory. Since one can view
the 6502's page-zero as an extended register set, with instructions dedicated
for it. Those instructions include indirection into main memory, which make
16-bit operations remarkably fast for a CPU that has no 16-bit registers.
Have a look at it and contemplate that. It's a VERY clever design, intended to
make for a small, hence, cheap, CPU chip.
Dick
----- Original Message -----
From: "Allison" <ajp166(a)bellatlantic.net
To: <classiccmp(a)classiccmp.org
Sent: Thursday, December 20, 2001 6:55 AM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
<snip
> > > > >
Z80 uses it's time differently... Then again how
many instuctions
would it take to do a 16bit add (result in register or convenient place).
The fact that both are still viable suggests they have adaquate
speed and a rich enough instruction set to do many tasks.
Last item, z80, Z180 and Z280 do not have the same timing.
For example the Z280 can be run at a bus speed slower than
the CPU speed and with the MMU and cache running in burst
mode you get a very different bus utilization model.
Generally the only things that count is:
Can the cpu do the task?
What cpu are you familiar with?
What is the total cost to implement the task (firmware/software counts)?
Politcial impacts (company prefers, owns, has, used before).
Do I think z80 is better than 6502? Yes, I'm biased. Is 6502 a good cpu?
I think so, it certainly beat the 6800 and a lot of others in the 8bit
space.
Would I design with it? No, lack of experience, no on hand software base
for it, limited tools to work with it. Would I consider it, likely.
I have 6502, 6800, 1802, SC/MP, SC/MPII, ti9900, 8048/9/874x, 8080,
8085, z80, Z180 Z280, 6809 and T-11 to pick from. For a new design
(personal) of some size say to run an OS then Z280 or T-11 for single chip
I have 8748, 8749 and 8751s around. For simple controllers 8085 is easy
to use if it grows out of the 8749. Then again I also have upd78pg11s too.
Why do you see the 8085 as growing out of the 8049? The 8085 was quite mature
when the 8049 came out, so they'r probably not from a common heritage, and the
instruction sets are so totally different that one might believe they're even
from a different manufacturer. The one that Intel
claimed grew out of the
8048/49 was the 8051.
Of all these old-timers, that's the only one that still has life, and it has
LIFE in a big way! There are many variants, with the same common instruction
set, but many different hardware features. The Dallas 89C420 runs at, 50 MIPS,
which certainly breathes life into the line. There are bit-banging things that
you can do with that one that few of the others above could handle in less than
10x the time, yet the architecture supports a full 64K of data space and a full
64K of code space, with memory mapped I/O in the data space.
12:09 p.m.
My favorite topic - I have to come out of hybernation :)
If you run each of the two at a rate that allows each
to use its shortest memory
cycle as the basic access window to memory, the 6502 will probably outperform
the Z80 in a task that operates on 8-bit data in an 8-bit way. The more 16 or
32-bit things you do, the more it favors the Z80, due to its inherent features
such as the 16-bit registers and operatons on them without intervening
instruction fetches.
Well, only to an extend - as usual we have to see the registers as
some cache - and as soon as your datasize outruns the cache size
you're soly dependant on the load and store interface ... and here
the 6502 is not only faster but also better suited if you forget
about memory as an enemy but wellcome it as a huge registerfile.
And the 6502 speeds away again.
If you compare the rate at which they operate,
however, the 6502 has features
that enable it to do 16-bit things quite handily in memory. Since one can view
the 6502's page-zero as an extended register set, with instructions dedicated
for it. Those instructions include indirection into main memory, which make
16-bit operations remarkably fast for a CPU that has no 16-bit registers.
Exactly.
Have a look at it and contemplate that. It's a
VERY clever design, intended to
make for a small, hence, cheap, CPU chip.
Also, if you realy want 'ultimate speed' you have to look at actual Versions.
close Z80 relatives (like 180) are available up to 32 MHz (I have seen only
20s, but well) while actual versions of the classic 6502 and 65816 is able
to do 14 MHz. Now take in account that a clock ratio of 1:3 to 1:4 for 6502
vs. Z80 (*) is a good rule of thump, so a 14 MHz 6502 equals a 42 to 56 MHz
Z80. Quite a racer ...
Gruss
H.
(*) I remember the the classical 3:1 or 4:1 clock ratio from various tests.
There have been lots of comparions around 1980 about that, and all eded
up around 1:4.
--
VCF Europa 3.0 am 27./28. April 2002 in Muenchen
http://www.vcfe.org/
12:31 p.m.
Also, if you realy want 'ultimate speed' you have to look at actual Versions.
close Z80 relatives (like 180) are available up to 32 MHz (I have seen only
20s, but well) while actual versions of the classic 6502 and 65816 is able
to do 14 MHz. Now take in account that a clock ratio of 1:3 to 1:4 for 6502
The 65816 can go up to 20Mhz. It is used in the SuperCPU for the 64 and
128.
vs. Z80 (*) is a good rule of thump, so a 14 MHz 6502
equals a 42 to 56 MHz
Z80. Quite a racer ...
Cheers,
Bryan Pope
12:44 p.m.
> Also, if you realy want 'ultimate speed'
you have to look at actual Versions.
> close Z80 relatives (like 180) are available up to 32 MHz (I have seen only
> 20s, but well) while actual versions of the classic 6502 and 65816 is able
> to do 14 MHz. Now take in account that a clock ratio of 1:3 to 1:4 for 6502
The 65816 can go up to 20Mhz. It is used in the
SuperCPU for the 64 and
128.
I heared about that - just the Super CPU also uses WDC65C816S which are only
specified up to 14 MHz ... I truly belive they are even above 20 MHz reliable,
just not specified !
Ciao
Hans
--
VCF Europa 3.0 am 27./28. April 2002 in Muenchen
http://www.vcfe.org/
21 Dec
21 Dec
12:19 a.m.
There are lots of claims out there that the 14 MHz part actually runs quite
safely and reliably at 20. Unfortunately, they won't tell me what they charge
for their full-speed chip, so I won't order 'em. There are HDL's out there
for
6502 core at considerable speeds well in excess of 20 MHz.
Dick
----- Original Message -----
From: "Hans Franke" <Hans.Franke(a)mch20.sbs.de>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 11:44 AM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
> > Also, if you realy want 'ultimate
speed' you have to look at actual
Versions.
> > close Z80 relatives (like 180) are available
up to 32 MHz (I have seen
only
> > 20s, but well) while actual versions of the
classic 6502 and 65816 is
able
> > to do 14 MHz. Now take in account that a
clock ratio of 1:3 to 1:4 for
6502
The 65816 can go up to 20Mhz. It is used in the
SuperCPU for the 64 and
128.
I heared about that - just the Super CPU also uses WDC65C816S which are only
specified up to 14 MHz ... I truly belive they are even above 20 MHz reliable,
just not specified !
Ciao
Hans
--
VCF Europa 3.0 am 27./28. April 2002 in Muenchen
http://www.vcfe.org/
20 Dec
20 Dec
3:21 p.m.
Again clockfrequencies and cycletimings are not a good way to
establish computingpower. You should look at the performance of
both processors at their maximum memory-throughput or bus-bandwidth
with the memory-technology of those days.
Although I like the Z80 and worked with it a lot, I still think that the
6502 was more powerfull from an userapplication perspective, all
other things being equal of course ..........
Anyway, both CPU's served their purpose and their downfall was
probably more related to their limited 16-bit performance and the
limit of the amount of directly accessable memory than their
respective 8-bit performance. After all, if they would have evolved
with the advance in technology they could both have achieved
more glorious days.
Remember that the M68000 family was designwise far superior
to the 8086/8088. But unfortunatly, we all know that (more often than not)
design-qualilty has no real relation to the succes of a CPU-family...........
Sipke de Wal
----------------------------------------------------------------
http://xgistor.ath.cx
----------------------------------------------------------------
----- Original Message -----
From: Bryan Pope <bpope(a)wordstock.com>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 7:31 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
>
> Also, if you realy want 'ultimate speed' you have to look at actual
Versions.
close Z80
relatives (like 180) are available up to 32 MHz (I have seen only
20s, but well) while actual versions of the classic 6502 and 65816 is able
to do 14 MHz. Now take in account that a clock ratio of 1:3 to 1:4 for 6502
The 65816 can go up to 20Mhz. It is used in the SuperCPU for the 64 and
128.
vs. Z80 (*) is a good rule of thump, so a 14 MHz
6502 equals a 42 to 56 MHz
Z80. Quite a racer ...
Cheers,
Bryan Pope
21 Dec
21 Dec
12:28 a.m.
The point I was trying to establish was that it's difficult to develop a basis
for comparison that treats both processors fairly. The Z80 has cycles of
different lengths that make it difficult to find a basis for comparing the two
based on similar memory bandwidth, while the 6502 tends to be used with half its
bus-time idle. That's not efficient use of the most costly element in the
system (based on 1980 parameters). If you compare oscillator frequency, the
6502 has a great advantage, and if you base the comparison on no-wait-state
memory bandwidth requirements, it has an unfair advantage again. My contention,
of course, is that even if you do level the playing field, the Z80 is still
slower overall, but especially at 8-bit microcontroller things, than the 6502.
What remains to be seen is whether the Z80 can muster any sort of win over the
6502 in terms of code that takes advantage of its rich internal register
resources.
One can't proceed with that, however, until a fair basis for comparison is
established.
Dick
----- Original Message -----
From: "Sipke de Wal" <sipke(a)wxs.nl>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 2:21 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
Again clockfrequencies and cycletimings are not a good
way to
establish computingpower. You should look at the performance of
both processors at their maximum memory-throughput or bus-bandwidth
with the memory-technology of those days.
Although I like the Z80 and worked with it a lot, I still think that the
6502 was more powerfull from an userapplication perspective, all
other things being equal of course ..........
Anyway, both CPU's served their purpose and their downfall was
probably more related to their limited 16-bit performance and the
limit of the amount of directly accessable memory than their
respective 8-bit performance. After all, if they would have evolved
with the advance in technology they could both have achieved
more glorious days.
Remember that the M68000 family was designwise far superior
to the 8086/8088. But unfortunatly, we all know that (more often than not)
design-qualilty has no real relation to the succes of a CPU-family...........
Sipke de Wal
----------------------------------------------------------------
http://xgistor.ath.cx
----------------------------------------------------------------
----- Original Message -----
From: Bryan Pope <bpope(a)wordstock.com>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 7:31 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
only
>
> Also, if you realy want 'ultimate speed' you have to look at actual
Versions.
> > close Z80 relatives (like 180) are available up to 32 MHz (I have seen
> > 20s, but well) while actual versions of the
classic 6502 and 65816 is
able
> > to do 14 MHz. Now take in account that a
clock ratio of 1:3 to 1:4 for
6502
>
> The 65816 can go up to 20Mhz. It is used in the SuperCPU for the 64 and
> 128.
>
> > vs. Z80 (*) is a good rule of thump, so a 14 MHz 6502 equals a 42 to 56
MHz
Z80. Quite a racer ...
Cheers,
Bryan Pope
20 Dec
20 Dec
2:57 p.m.
The fact that the 6502 was a kinda striped-down version of
the M6800, and was more efficient from a computing power
perspective, has convinced some people that the 6502 was
the first (and only 8-bit) RISC-processor.
If the MOS people had given the chip more on board general
purpose registers (i.e. like zero-page memory on-chip) and if they
had truely done away with some more Motorola-like CISC
instructions, it would really have pulled it off as a true RISC-design.
Sipke de Wal
----------------------------------------------------------------
http://xgistor.ath.cx
----------------------------------------------------------------
----- Original Message -----
From: Richard Erlacher <edick(a)idcomm.com>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 5:42 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
There are lots of things that you could compare, but
the first things you've
got
to leave out are the ones that aren't a Z80, which
immediately deletes the
Z180,
and Z280. The Z80 is not around any more than the
6502 is around. There are
derivatives of the 6502 still in production, but they are few. There are
derivative of the Z80 being produced as well. None of the former are 6502's,
and none of the latter are Z80's.
Your're right, in that they use their time differently. Because of the vast
architectural differences, one has to be cautious about chosing a comparison.
The first basis, before chosing a set of instructions for a comparision,
however, is selection of an appropriate timebase. The Z80 uses its clock
differently than the 6502 does. The Z80 never uses fewer than 2 clock ticks
for
a complete memory cycle, ant 2 ticks is only the
lenght of the M1 cycle.
That's
followed by the refresh cycle, during which, if I
understand the process
correctly, the Z80 decodes that opcode. "Normal" memory cycles are three
clock-ticks in length, though only thwo of them are actually used during the
actual access of memory. The memory access portion of the M1 cycle is
essentially a
The 6502 uses one clock tick for each CPU cycle. External hardware determines
how long the memory access is, though the period beginning with valid
addresses
and read/write begins just under half-way into phase-1
and continues
throughout
phase-2, each of which is actually more-or-less half a
clock cycle long. If
you
don't attempt to do transparent memory sharing
along the phase-1/phase-2
boundary, a memory cycle can be as long as 1-1/2 clock ticks.
All of these constraints are based on the addition of no wait-states. The Z80
has excellent support for wait-state insertion during any cycle other than the
refresh cycle. The early NMOS 6502 supports wait state insertion on read
cycles
only. There are ways of getting around this, but the
Z80 certainly makes it
easier than does the 6502. CMOS 6502's support wait states on both read and
write cycles.
If you run each of the two at a rate that allows each to use its shortest
memory
cycle as the basic access window to memory, the 6502
will probably outperform
the Z80 in a task that operates on 8-bit data in an 8-bit way. The more 16 or
32-bit things you do, the more it favors the Z80, due to its inherent features
such as the 16-bit registers and operatons on them without intervening
instruction fetches.
If you compare the rate at which they operate, however, the 6502 has features
that enable it to do 16-bit things quite handily in memory. Since one can
view
the 6502's page-zero as an extended register set,
with instructions dedicated
for it. Those instructions include indirection into main memory, which make
16-bit operations remarkably fast for a CPU that has no 16-bit registers.
Have a look at it and contemplate that. It's a VERY clever design, intended
to
make for a small, hence, cheap, CPU chip.
Dick
----- Original Message -----
From: "Allison" <ajp166(a)bellatlantic.net>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 6:55 AM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
that
Z80 uses it's time differently... Then again
how many instuctions
would it take to do a 16bit add (result in register or convenient place).
The fact that both are still viable suggests they have adaquate
speed and a rich enough instruction set to do many tasks.
Last item, z80, Z180 and Z280 do not have the same timing.
For example the Z280 can be run at a bus speed slower than
the CPU speed and with the MMU and cache running in burst
mode you get a very different bus utilization model.
Generally the only things that count is:
Can the cpu do the task?
What cpu are you familiar with?
What is the total cost to implement the task (firmware/software counts)?
Politcial impacts (company prefers, owns, has, used before).
Do I think z80 is better than 6502? Yes, I'm biased. Is 6502 a good cpu?
I think so, it certainly beat the 6800 and a lot of others in the 8bit
space.
Would I design with it? No, lack of experience, no on hand software base
for it, limited tools to work with it. Would I consider it, likely.
I have 6502, 6800, 1802, SC/MP, SC/MPII, ti9900, 8048/9/874x, 8080,
8085, z80, Z180 Z280, 6809 and T-11 to pick from. For a new design
(personal) of some size say to run an OS then Z280 or T-11 for single chip
I have 8748, 8749 and 8751s around. For simple controllers 8085 is easy
to use if it grows out of the 8749. Then again I also have upd78pg11s too.
Why do you see the 8085 as growing out of the 8049? The 8085 was quite mature
when the 8049 came out, so they'r probably not from a common heritage, and the
instruction sets are so totally different that one might believe they're even
from a different manufacturer. The one that Intel claimed grew out of the
8048/49 was the 8051.
Of all these old-timers, that's the only one that still has life, and it has
LIFE in a big way! There are many variants, with the same common instruction
set, but many different hardware features. The Dallas 89C420 runs at, 50 MIPS,
which certainly breathes life into the line. There are bit-banging things you can do with that one that few of the others above
could handle in less
than
10x the time, yet the architecture supports a full 64K
of data space and a
full
64K of code space, with memory mapped I/O in the data
space.
<snip>
> >>
> >>
>
21 Dec
21 Dec
12:22 a.m.
I'm not at all sure one could fairly say the 6502 was a "stripped down M6800.
It has 56 documented instructions, not to mention the undocumented ones, so it's
probably not a RISC. The CMOS version has many more instructions, and it has
more addressing modes than the MOT processor.
It does store low-byte-first, though, so, in that respect, it's different from
the MOT parts.
Dick
----- Original Message -----
From: "Sipke de Wal" <sipke(a)wxs.nl>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 1:57 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
determines
Z80
outperform
dedicated
counts)?
The fact that the 6502 was a kinda striped-down
version of
the M6800, and was more efficient from a computing power
perspective, has convinced some people that the 6502 was
the first (and only 8-bit) RISC-processor.
If the MOS people had given the chip more on board general
purpose registers (i.e. like zero-page memory on-chip) and if they
had truely done away with some more Motorola-like CISC
instructions, it would really have pulled it off as a true RISC-design.
Sipke de Wal
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http://xgistor.ath.cx
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----- Original Message -----
From: Richard Erlacher <edick(a)idcomm.com>
To: <classiccmp(a)classiccmp.org>
Sent: Thursday, December 20, 2001 5:42 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
are
There are lots of things that you could compare,
but the first things you've
got
to leave out are the ones that aren't a Z80,
which immediately deletes the
Z180,
> and Z280. The Z80 is not around any more than the 6502 is around. There > derivatives of the 6502 still in production, but
they are few. There are
> derivative of the Z80 being produced as well. None of the former are
6502's,
> and none of the latter are Z80's.
>
> Your're right, in that they use their time differently. Because of the vast
> architectural differences, one has to be cautious about chosing a
comparison.
The first
basis, before chosing a set of instructions for a comparision,
however, is selection of an appropriate timebase. The Z80 uses its clock
differently than the 6502 does. The Z80 never uses fewer than 2 clock ticks
for
a complete memory cycle, ant 2 ticks is only the
lenght of the M1 cycle.
That's
> followed by the refresh cycle, during which, if I understand the process
> correctly, the Z80 decodes that opcode. "Normal" memory cycles are three
> clock-ticks in length, though only thwo of them are actually used during the
> actual access of memory. The memory access portion of the M1 cycle is
> essentially a
>
> The 6502 uses one clock tick for each CPU cycle. External hardware
how long the
memory access is, though the period beginning with valid
addresses
and read/write begins just under half-way into
phase-1 and continues
throughout
phase-2, each of which is actually more-or-less
half a clock cycle long. If
you
> don't attempt to do transparent memory sharing along the phase-1/phase-2
> boundary, a memory cycle can be as long as 1-1/2 clock ticks.
>
> All of these constraints are based on the addition of no wait-states. The
> has excellent support for wait-state insertion
during any cycle other than
the
refresh cycle.
The early NMOS 6502 supports wait state insertion on read
cycles
only. There are ways of getting around this, but
the Z80 certainly makes it
easier than does the 6502. CMOS 6502's support wait states on both read and
write cycles.
If you run each of the two at a rate that allows each to use its shortest
memory
> cycle as the basic access window to memory, the 6502 will probably > the Z80 in a task that operates on 8-bit data in
an 8-bit way. The more 16
or
> 32-bit things you do, the more it favors the Z80,
due to its inherent
features
> such as the 16-bit registers and operatons on
them without intervening
> instruction fetches.
>
> If you compare the rate at which they operate, however, the 6502 has
features
that enable it
to do 16-bit things quite handily in memory. Since one can
view
> the 6502's page-zero as an extended register set, with instructions
for it. Those
instructions include indirection into main memory, which make
16-bit operations remarkably fast for a CPU that has no 16-bit registers.
Have a look at it and contemplate that. It's a VERY clever design, intended
to
> make for a small, hence, cheap, CPU chip.
>
> Dick
>
> ----- Original Message -----
> From: "Allison" <ajp166(a)bellatlantic.net>
> To: <classiccmp(a)classiccmp.org>
> Sent: Thursday, December 20, 2001 6:55 AM
> Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
>
>
> > Z80 uses it's time differently... Then again how many instuctions
> > would it take to do a 16bit add (result in register or convenient place).
> >
> > The fact that both are still viable suggests they have adaquate
> > speed and a rich enough instruction set to do many tasks.
> >
> > Last item, z80, Z180 and Z280 do not have the same timing.
> > For example the Z280 can be run at a bus speed slower than
> > the CPU speed and with the MMU and cache running in burst
> > mode you get a very different bus utilization model.
> >
> > Generally the only things that count is:
> >
> > Can the cpu do the task?
> > What cpu are you familiar with?
> > What is the total cost to implement the task (firmware/software
> > Politcial impacts (company prefers,
owns, has, used before).
> >
> > Do I think z80 is better than 6502? Yes, I'm biased. Is 6502 a good cpu?
> > I think so, it certainly beat the 6800 and a lot of others in the 8bit
> > space.
> > Would I design with it? No, lack of experience, no on hand software base
> > for it, limited tools to work with it. Would I consider it, likely.
> >
> > I have 6502, 6800, 1802, SC/MP, SC/MPII, ti9900, 8048/9/874x, 8080,
> > 8085, z80, Z180 Z280, 6809 and T-11 to pick from. For a new design
> > (personal) of some size say to run an OS then Z280 or T-11 for single chip
> > I have 8748, 8749 and 8751s around. For simple controllers 8085 is easy
> > to use if it grows out of the 8749. Then again I also have upd78pg11s
too.
> >
> Why do you see the 8085 as growing out of the 8049? The 8085 was quite
mature
> when the 8049 came out, so they'r probably
not from a common heritage, and
the
> instruction sets are so totally different that
one might believe they're
even
> from a different manufacturer. The one that
Intel claimed grew out of the
> 8048/49 was the 8051.
>
> Of all these old-timers, that's the only one that still has life, and it has
> LIFE in a big way! There are many variants, with the same common
instruction
> set, but many different hardware features. The
Dallas 89C420 runs at, 50
MIPS,
which
certainly breathes life into the line. There are bit-banging things
that
you can do with that one that few of the others
above could handle in less
than
10x the time, yet the architecture supports a
full 64K of data space and a
full
64K of code space, with memory mapped I/O in the
data space.
<snip>
> >>
> >>
>
12:37 p.m.
I'm not at all sure one could fairly say the 6502
was a "stripped down M6800.
It has 56 documented instructions, not to mention the undocumented ones, so it's
probably not a RISC. The CMOS version has many more instructions, and it has
more addressing modes than the MOT processor.
It does store low-byte-first, though, so, in that
respect, it's different from
the MOT parts.
That, and the missed chance to use the BRK instruktion as an SVC
instruction (*) are the only parts I never liked about the '02.
Gruss
H.
(*) Yes, I know, the PC was already advanced, and using 12 or so
operations to access the byte to read the byte which has already
been on the date bus is possible, and often done, none the less,
it's a huge missed chance.
--
VCF Europa 3.0 am 27./28. April 2002 in Muenchen
http://www.vcfe.org/
12:37 p.m.
The fact that the 6502 was a kinda striped-down
version of
the M6800, and was more efficient from a computing power
perspective, has convinced some people that the 6502 was
the first (and only 8-bit) RISC-processor.
Some truth in here.
If the MOS people had given the chip more on board
general
purpose registers (i.e. like zero-page memory on-chip) and if they
had truely done away with some more Motorola-like CISC
instructions, it would really have pulled it off as a true RISC-design.
As for speed reasons there would have been no difference.
Code length would have been the same (instead of a zero
page address, the second byte yould have been a register
number), and execution size also - The cycle the 6502
used to access the memory youl now have been used internal
to execute the instruction. The only gain would have been
a cycle where the CPU don't uses the bus.
No real advantage - for it'S design the 6502 is close to
the possible maximum in terms of efficent timeing.
Gruss
H.
--
VCF Europa 3.0 am 27./28. April 2002 in Muenchen
http://www.vcfe.org/
24 Dec
24 Dec
11:28 p.m.
New subject: Still want that Audrey?
Hans,
Did we ever work out a method for moving money? I still have this
Audrey ready to go out.
-ethan
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25 Dec
25 Dec
1:27 a.m.
New subject: Still want that Audrey?
--- Ethan Dicks <erd_6502(a)yahoo.com> wrote:
Whoops! Meant for private mail. Sorry.
-ethan
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13 comments
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participants (6)
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ajp166＠bellatlantic.net -
bpope＠wordstock.com -
edick＠idcomm.com -
erd_6502＠yahoo.com -
Hans.Franke＠mch20.sbs.de -
sipke＠wxs.nl