29 Nov
2016
29 Nov
'16
9:22 a.m.
From: Peter Coghlan
Can anyone suggest an existing, simple QBUS device
that I could study
the documentation of to figure out what a basic QBUS device needs to
have and to give me some ideas on how to implement one?
Depends. Do you want to be able to do interrupts? Do you want to be able to
do DMA? Each is a significant increment in complexity.
Later DEC QBUS devices may not be the best things to look at, since they tend
to use special DEC QBUS control chips (I'm _not_ talking about bus
transceiver chips here) which are of course no longer available.
If all you want is master/slave (i.e. the ability to read/write registers),
try this:
http://ana-3.lcs.mit.edu/~jnc/tech/QSIC/test.pdf
It implements a single 16-bit register. (Changing it to support a single
block of registers would of course be trivial.)
The switches (and associated comparators) in the lower left allow one to set
the bus address it responds to; the 3 latches on the right hold the register
contents; the drivers/buffers below them drive LEDs to display the register
contents. The control logic is about as simple as it can be; one latch, and a
couple of gates.
You should probably read the QBUS description in any QBUS PDP-11 manual
before attempting to understand it, but having done that, it should be pretty
self-explanatory - the signal names should clue you in to what they mean.
From: Glen Slick
I have an M9405-PA. It has one male and one female
3-row 50-pin
D-shell connector.
That's on the metal plate, right? The board itself should have a 2x25
Berg header.
Noel
29 Nov
29 Nov
9:54 a.m.
New subject: Homebrew QBus designs - was Re: VAX 4000-100 QBUS cables
On 2016-11-29 12:22 PM, Noel Chiappa wrote:
This is great! Are there any other accompanying materials of interest to
QBus hobbyists?
--Toby
From: Peter
Coghlan
Can anyone suggest an existing, simple QBUS
device that I could study
the documentation of to figure out what a basic QBUS device needs to
have and to give me some ideas on how to implement one?
Depends. Do you want to be able to do interrupts? Do you want to be able to
do DMA? Each is a significant increment in complexity.
Later DEC QBUS devices may not be the best things to look at, since they tend
to use special DEC QBUS control chips (I'm _not_ talking about bus
transceiver chips here) which are of course no longer available.
If all you want is master/slave (i.e. the ability to read/write registers),
try this:
http://ana-3.lcs.mit.edu/~jnc/tech/QSIC/test.pdf
It implements a single 16-bit register. (Changing it to support a single
block of registers would of course be trivial.) ...
10:24 a.m.
New subject: Homebrew QBus designs - was Re: VAX 4000-100 QBUS cables
On Tue, Nov 29, 2016 at 12:54 PM, Toby Thain <toby at telegraphics.com.au> wrote:
On 2016-11-29 12:22 PM, Noel Chiappa wrote:
>
> > From: Peter Coghlan
>
> > Can anyone suggest an existing, simple QBUS device that I could
> study
> > the documentation of to figure out what a basic QBUS device needs to
> > have and to give me some ideas on how to implement one?
>
> Depends. Do you want to be able to do interrupts? Do you want to be able
> to
> do DMA? Each is a significant increment in complexity.
>
> Later DEC QBUS devices may not be the best things to look at, since they
> tend
> to use special DEC QBUS control chips (I'm _not_ talking about bus
> transceiver chips here) which are of course no longer available.
The DEC Chipkit documentation has the internal schematics for the
standard DEC interface chips and is very much worth a read.
30 Nov
30 Nov
4:22 a.m.
New subject: Homebrew QBus designs - was Re: VAX 4000-100 QBUS cables
On 11/29/16 1:24 PM, Charles Dickman wrote:
On Tue, Nov 29, 2016 at 12:54 PM, Toby Thain <toby
at telegraphics.com.au> wrote:
The major advantage of using chipkit parts is space. If you build on a
quad wide board
then its fairly easy to do DMA, bus arbitration, interrupt chain, and
interrupt vectors
as its all documented in the various Qbus PDP-11 books.
About the only thing I've done is simple parallel interfaces as any
other function
was available built. Though one of these days a CF "disk" board with
boot rom
would be handy. that would make a 11/23, dlv11j, memory and self contained
disk card a nice 4 board system in a BA11-VA box.
Allison
On 2016-11-29 12:22 PM, Noel Chiappa wrote:
> > From: Peter Coghlan
>
> > Can anyone suggest an existing, simple QBUS device that I could
> study
> > the documentation of to figure out what a basic QBUS device needs to
> > have and to give me some ideas on how to implement one?
>
> Depends. Do you want to be able to do interrupts? Do you want to be able
> to
> do DMA? Each is a significant increment in complexity.
>
> Later DEC QBUS devices may not be the best things to look at, since they
> tend
> to use special DEC QBUS control chips (I'm _not_ talking about bus
> transceiver chips here) which are of course no longer available.
The DEC
Chipkit documentation has the internal schematics for the
standard DEC interface chips and is very much worth a read.
29 Nov
29 Nov
10:47 a.m.
Noel Chiappa wrote:
Interrupts would be great to have and DMA might also be useful down the line
but I have a much better chance of getting somewhere with this if I keep
things as simple as possible for now anyway.
From: Peter Coghlan
Can anyone suggest an existing, simple QBUS
device that I could study
the documentation of to figure out what a basic QBUS device needs to
have and to give me some ideas on how to implement one?
Depends. Do you want to be able to do interrupts? Do you want to be able to
do DMA? Each is a significant increment in complexity.
Later DEC QBUS devices may not be the best things to look at, since they tend
to use special DEC QBUS control chips (I'm _not_ talking about bus
transceiver chips here) which are of course no longer available.
A single chip plus tranceivers solution would be ideal but I couldn't see it
being that easy :-)
If all you want is master/slave (i.e. the ability to read/write registers),
try this:
http://ana-3.lcs.mit.edu/~jnc/tech/QSIC/test.pdf
It implements a single 16-bit register. (Changing it to support a single
block of registers would of course be trivial.)
This is pretty much exactly what I was looking for. Thanks!
The switches (and associated comparators) in the lower left allow one to set
the bus address it responds to; the 3 latches on the right hold the register
contents; the drivers/buffers below them drive LEDs to display the register
contents. The control logic is about as simple as it can be; one latch, and a
couple of gates.
I've studied the circuit a bit and it seems pretty clear what most of it is
doing. However, I am puzzled by the BPOK and BINIT signals being connected to
U7 even though they do not seem to get used for either input or output. I
wonder is this just because two tranceivers were left over and they might
as well have something connected to them that might come in handy later or is
it because I am failing to understand something properly?
You should probably read the QBUS description in any QBUS PDP-11 manual
before attempting to understand it, but having done that, it should be pretty
self-explanatory - the signal names should clue you in to what they mean.
Thanks. I'll do that.
Another thing I noticed is that there are rather more than 50 QBUS signals
listed on the top right of the circuit diagram. I guess which ones are omitted
from the 50 pin D connectors will become apparant when
I find a pinout for
those connectors. I suppose the power rails and those labeled
"spare" are
likely candidates for omission.
I was hoping that there would be lots of signal pairs like SCSI and some 25
pair telephone cable I have on hand might be suitable for the cabling but it
doesn't look like that is going to be appropriate.
Regards,
Peter Coghlan
1:07 p.m.
On 11/29/2016 01:47 PM, Peter Coghlan wrote:
A single chip plus tranceivers solution would be ideal
but I couldn't see it
being that easy :-)
I have a single chip plus transceivers solution but my single chip is a
Xilinx Artix 7 FPGA. Maybe that's cheating but it does implement
register reads and writes, interrupt cycles, bus master operations, and
memory reads and writes in that single chip. :-)
3:13 p.m.
On Nov 29, 2016 11:44 AM, "Peter Coghlan" <cctalk at beyondthepale.ie>
wrote:
Another thing I noticed is that there are rather more than 50 QBUS signals
listed on the top right of the circuit diagram. I guess which ones are
omitted
from the 50 pin D connectors will become apparant when
I find a pinout for
those connectors. I suppose the power rails and those labeled "spare" are
likely candidates for omission.
There are *two* 50-pin bus extension cables, not just one. More than enough
signal lines for the 72 card edge fingers on a dual wide card. (18 per 2
sides per the A and B card edge connector positions).
2709
days inactive
2710
days old
6 comments
7 participants
participants (7)
-
ajp166＠verizon.net -
cctalk＠beyondthepale.ie -
chd＠chdickman.com -
dab＠froghouse.org -
glen.slick＠gmail.com -
jnc＠mercury.lcs.mit.edu -
toby＠telegraphics.com.au