20 Apr
2011
20 Apr
'11
11:07 a.m.
So I attended Notacon, and some people may be interested to know that
there was a Lisa there brought by the CMU Computer Club. They hacked
together a demo on it, which was pretty decent given the clock speed,
etc. They claim "first lisa demo ever." --- you know how that goes
around here! :) The demo concluded with the apple logo in COLOR, which
they did by translating the brightness-level information into color on
the FPGA board.
They used an fpga development board to bring digital video signals in
off the chips, and frame buffer it and output to an HDMI output port.
They didn't actually scan convert it, but left it at its native
resolution, which was something weird. Like 700 x 300 or something?
(quick google says 720 x 364)
When pushing them for more answers on details of their hacked together
video solution, and ideas for scan converting --- they clammed up, and
said that since they will be offering a commercial product at some point
in the future, they couldn't talk about it. Weren't going to document
it publicly, post it online, etc.
I suppose it's not too surprising that college kids don't understand the
difference between raw ideas & prototyping vs executing and marketing an
actual product. I just found it disappointing that it happened at a
place where the fundamental point of getting together is to share
information. I guess they consider sharing a one-way street.
Keith
20 Apr
20 Apr
12:04 p.m.
When pushing them for more answers on details of their
hacked together
video solution, and ideas for scan converting --- they clammed up, and
said that since they will be offering a commercial product at some point
in the future, they couldn't talk about it. Weren't going to document it
publicly, post it online, etc.
I doubt that someone with some fpga experience like Phillip Pemberton
would take more than half a day to create something like this...Why worry?
They will launch it on the market and on the next day, a page with a cheap
(say: Free) replacement will pop up on hack-a-day.
12:50 p.m.
On 4/20/2011 12:04 PM, Alexandre Souza - Listas wrote:
I'm most definitely going to document any of my efforts online with
code, references, etc.
I was interested and talking about it because I've just been messing
around with creating (for myself) a small amiga scan converter. Somewhat
practical exercise to increase my understanding of hardware design and
fpga's.
Keith
When pushing
them for more answers on details of their hacked together
video solution, and ideas for scan converting --- they clammed up, and
said that since they will be offering a commercial product at some
point in the future, they couldn't talk about it. Weren't going to
document it publicly, post it online, etc.
I doubt that someone with some fpga experience like Phillip Pemberton
would take more than half a day to create something like this...Why
worry? They will launch it on the market and on the next day, a page
with a cheap (say: Free) replacement will pop up on hack-a-day. 
2:04 p.m.
On 20/04/11 17:04, Alexandre Souza - Listas wrote:
I doubt that someone with some fpga experience like
Phillip Pemberton
would take more than half a day to create something like this...
I'll take that bet!
Now who wants to buy me a Lisa, a bunch of connectors and a copy of the
Lisa equivalent of the Apple ][ Red Book? :)
What I'd really like to do is an FPGA reimplementation of the AT&T 3B1.
That would be cool. Might also help me find the last few memory
protection bugs which are breaking the diagnostics.
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
4:26 p.m.
What I'd really like to do is an FPGA
reimplementation of the AT&T 3B1.
That would be cool. Might also help me find the last few memory
protection bugs which are breaking the diagnostics.
I would be your first customer. I've always wanted to play with a 3B1, even
a facsimile.
--
------------------------------------ personal: http://www.cameronkaiser.com/ --
Cameron Kaiser * Floodgap Systems * www.floodgap.com * ckaiser at floodgap.com
-- Anything that can be put into a nutshell belongs there. -- F. G. Brauer ----
5:04 p.m.
On 20/04/11 21:26, Cameron Kaiser wrote:
Which is part of the reason I'm working on FreeBee (aka 3b1emu). Like
said though -- finding those bugs would involve dropping a logic
analyser on the system bus, kicking off the memory protection tests,
then comparing the state dump against the debug output from my emulator.
It does pass the MAP RAM, VRAM and MAIN RAM tests, though. About the
only thing it fails is (if memory serves) major 12, minor 1 -- page
fault detection. I think I've got the rules for setting the page access
bits slightly wrong. Understanding how the whole system fits together is
a real pain when the schematics spread over ~15 A4 pages, plus the PAL
equations and gate array schematics.
And I'd still love a copy of the Field Service Debug PROMs (the monitor
PROM would be VERY VERY nice) and some info on how the DMA Data Gate
Array works...
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
What I'd
really like to do is an FPGA reimplementation of the AT&T 3B1.
That would be cool. Might also help me find the last few memory
protection bugs which are breaking the diagnostics.
I would be your first customer. I've always wanted to play with a 3B1, even
a facsimile. 
8:20 p.m.
Cameron Kaiser wrote:
Why would you need to do it in an FPGA? It's a 68k with fairly
"standard" hardware.
Peace... Sridhar
What I'd
really like to do is an FPGA reimplementation of the AT&T 3B1.
That would be cool. Might also help me find the last few memory
protection bugs which are breaking the diagnostics.
I would be your first customer. I've always wanted to play with a 3B1, even
a facsimile.
9:23 p.m.
On 21/04/11 01:20, Sridhar Ayengar wrote:
Because the standard board is frickin' huge, a massive power hog and
known to be a wee bit on the unreliable side.
Drop the design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
I would be
your first customer. I've always wanted to play with a 3B1,
even
a facsimile.
Why would you need to do it in an FPGA? It's a 68k with fairly
"standard" hardware. 
21 Apr
21 Apr
5:02 p.m.
On 21/04/11 01:20, Sridhar Ayengar wrote:
Because the standard board is frickin' huge, a massive power hog and
WHo cares how large it is, or how much power it draws? I am dead serious,
what does it matter.
I would
be your first customer. I've always wanted to play with a 3B1,
even
a facsimile.
Why would you need to do it in an FPGA? It's a 68k with fairly
"standard" hardware. known to be a wee bit on the unreliable side.
And if it was an FPGA with RAM hung off it, I am pretty sure there'd be
_none_ still working, and unless the original design data
(vhdl/schematics/etc for the FPGA) was availale, I don't see how they
could be repaired.
Yes, I know you're one of the 'good guys' and publish your FPGA desings,
but docuemtnation does get lost....
Drop the design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
-tony
8:45 p.m.
On Thu, 21 Apr 2011, Tony Duell wrote:
/me surrounds Tony with a ring of "Keep off the lawn!" signs
g.
--
Proud owner of F-15C 80-0007
http://www.f15sim.com - The only one of its kind.
http://www.simpits.org/geneb - The Me-109F/X Project
ScarletDME - The red hot Data Management Environment
A Multi-Value database for the masses, not the classes.
http://www.scarletdme.org - Get it _today_!
Political correctness is a doctrine, fostered by a delusional, illogical
minority, and rabidly promoted by an unscrupulous mainstream media, which
holds forth the proposition that it is entirely possible to pick up a turd
by the clean end.
Drop the design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
22 Apr
22 Apr
2:28 p.m.
Drop the design into an FPGA and you go from several
huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
4:51 p.m.
On Fri, 22 Apr 2011, Tony Duell wrote:
/me surrounds Tony with a ring of "Keep off the lawn!" signs
Can you explain, please?
It's an amusing (well _I_ thought so) way of relating the
stereotypical "You kids! Get of my lawn!" attitude expressed when
something new/different/change is presented to someone "entrenched" in
their ways.
Your statement of " With nowhere to connect the 'scope and logic analyser
to debug it, no interesting signals to look at... Might as well jsut buy a
modern PC." immediately conjoured(sp!) up a picture in my head of an old
man waving his cane and yelling something about "those damn kids and their
new fangled gadgets". It made me laugh, so I boiled it down to something
that everyone (ok, with one exception apparently) could understand and
grin over.
Now normally, having to explain a joke ruins it, but in this case, I don't
think it applies.
Oh and "/me" is an action command that is in common use with IRC, so the
resulting line, had it been rendered within an IRC client, would have
looked like this:
geneb surrounds Tony with a ring of "Keep off the lawn!" signs
Enjoy!
g.
--
Proud owner of F-15C 80-0007
http://www.f15sim.com - The only one of its kind.
http://www.simpits.org/geneb - The Me-109F/X Project
ScarletDME - The red hot Data Management Environment
A Multi-Value database for the masses, not the classes.
http://www.scarletdme.org - Get it _today_!
Political correctness is a doctrine, fostered by a delusional, illogical
minority, and rabidly promoted by an unscrupulous mainstream media, which
holds forth the proposition that it is entirely possible to pick up a turd
by the clean end.
Drop the
design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
1:42 p.m.
On 23/04/11 04:39, Alexandre Souza - Listas wrote:
ROFL!
If you're saying what I suspect you are... then there's a British
alternative version of the same idiom:
"$PERSON just had a blond moment!"
> Can you
explain, please?
In Brazil, land of the politically incorrect, we would say "Tony just
got blond hair!" :oD BTW, do you know what happens when a blondie tints the
hair black?
"Artificial Intelligence!" :oD
(drums, hi-hat)
That's an old one, but worth a grin nonetheless :)
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
2:19 p.m.
On 24/04/11 19:07, Alexandre Souza - Listas wrote:
"$PERSON just said or did something rather stupid."
It's also often applied to one's self...
"Hey Bill, what's the point of the variable $dt_shift in this code you
wrote? Oh, wait.. never mind, blond moment -- I just spotted the
comment below the value assignment."
The meaning in this case being something to the effect of "Oh damn, I
just screwed up."
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
If you're
saying what I suspect you are... then there's a British
alternative version of the same idiom:
What do you suspect I am? :oD "$PERSON
just had a blond moment!"
HAHAHHA I'll use that in portuguese :)
21 Apr
21 Apr
9:05 p.m.
On 21/04/11 22:02, Tony Duell wrote:
Go look up "ChipScope" and "SignalTap II".
Then tell me you can't spy on the internal logic of an FPGA.
If you really want to use a standalone logic analyser (I often do
because it tends to be more reliable) then there's always the option of
pulling a couple of pins out onto solder pads. The 1.27mm TESTPADs in
the EAGLE base libraries work quite well IME. Big enough to be easy to
solder to, small enough that they don't take up much board space.
The DiscFerret ICSP header is as big as it is for one reason only:
because when you're using pogo pins, you want the alignment to be as
insignificant (or "non-critical" if you prefer) as is technically possible!
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
Drop the
design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
22 Apr
22 Apr
2:35 p.m.
On 21/04/11 22:02, Tony Duell wrote:
Go look up "ChipScope" and "SignalTap II".
Then tell me you can't spy on the internal logic of an FPGA.
I never said you couldn't monitor internal signals, I said you can't
connectr a 'scope or logic analyser to interesting points in the
circuitry.
And from waht you say below, these tools are none-too-reliable. The last
thing I need when I am debuggign something it so be unable to trust my
instruments. Or as I found when using one version of the Xylinx tools
many years ago 'Is that glitch a real one, or is it something the
simulator has come up with...'
Drop the
design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
If you really want to use a standalone logic analyser (I often do
because it tends to be more reliable) then there's always the option of
pulling a couple of pins out onto solder pads. The 1.27mm TESTPADs in
Ah yes.... But be very careful doing this.
The 'wires' in an FPGA are not direcrt connecitons, they go through
various routing swithces, which introduce delays. If you add connections
to monitor internal signals, it's very likely other signals will be
rerouted and will havw their delays changed. If your design is dodgy to
start with, you may find glitches come and go when you do this.
And of course you can only modify the design to bring out signals if
you have the origianl design files (VHDL, schematics, whatever). As I
said, i know you provide such things, but they can get lost. Whereas I
have, on many coccasions, debugged large boards of SSI/MSI parts with no
docuemtnatiuon at all.
the EAGLE base libraries work quite well IME. Big
enough to be easy to
solder to, small enough that they don't take up much board space.
The DiscFerret ICSP header is as big as it is for one reason only:
I still don;t get this desire to make things as small as possible. What
is the great advantage?
-tony
4:56 p.m.
On Fri, 22 Apr 2011, Tony Duell wrote:
Because board space is expensive! Some board houses even charge by the
drill!
g.
--
Proud owner of F-15C 80-0007
http://www.f15sim.com - The only one of its kind.
http://www.simpits.org/geneb - The Me-109F/X Project
ScarletDME - The red hot Data Management Environment
A Multi-Value database for the masses, not the classes.
http://www.scarletdme.org - Get it _today_!
Political correctness is a doctrine, fostered by a delusional, illogical
minority, and rabidly promoted by an unscrupulous mainstream media, which
holds forth the proposition that it is entirely possible to pick up a turd
by the clean end.
The DiscFerret ICSP header is as big as it is for one reason only:
I still don;t get this desire to make things as small as possible. What
is the great advantage?
20 Apr
20 Apr
4:42 p.m.
On Wed, 20 Apr 2011, Alexandre Souza - Listas wrote:
I doubt that someone with some fpga experience
like Phillip Pemberton
would take more than half a day to create something like this...Why worry?
They will launch it on the market and on the next day, a page with a cheap
(say: Free) replacement will pop up on hack-a-day.
And, when they try to market it with "first Lisa demo EVER", being 28
years late, they lose a bit of credibility.
4839
days inactive
4843
days old
21 comments
9 participants
participants (9)
-
ard＠p850ug1.demon.co.uk -
cisin＠xenosoft.com -
classiccmp＠philpem.me.uk -
geneb＠deltasoft.com -
keithvz＠verizon.net -
mcguire＠neurotica.com -
ploopster＠gmail.com -
pu1bzz.listas＠gmail.com -
spectre＠floodgap.com