3 Jul
2001
3 Jul
'01
10:56 a.m.
Version 2.1 of my Catweasel Floppy Read/Write Tools (cw2dmk and dmk2cw)
is now available at http://www.tim-mann.org/trs80resources.html. This
release adds some heuristics to cw2dmk to produce cleaner output files
and to autodetect RX02 encoding.
Standard blurb on the tools:
The Catweasel Floppy Read/Write Tools are software for the Catweasel ISA
universal floppy disk controller. cw2dmk will read several kinds of floppy
disk, some of which ordinary PC controllers have trouble with, and save
them in the DMK disk image format. (DMK is a format used by the Unix TRS-80
emulator xtrs and by David Keil's TRS-80 emulator for MS-DOS.) cw2dmk
does not just read TRS-80 disks; it can handle (at least) any disk written
using a Western Digital 177x/179x floppy disk controller, a PC-style
NEC765-compatible controller, or a Digital Equipment Corporation RX02
controller. dmk2cw will write any DMK image back to a real floppy disk,
and handles the same kinds of disks as cw2dmk. The tools run on both Linux
and MS-DOS. Source code is included under the GPL.
Tim Mann tim.mann(a)compaq.com http://www.tim-mann.org
Compaq Computer Corporation, Systems Research Center, Palo Alto, CA
6 Jul
6 Jul
2:54 p.m.
New subject: 2116 and other old memory chips
I am in the process of attempting to repair, with Pete Turnbull's
invaluable guidance, an Exidy Sorcerer.
The manual recites that the memory chips, depending on configuration,
are 2104 (4k) or 2116 (16k).
A casual perusal of chip sources shows that most begin their dynamic
ram sections with 4116 chips. The only mention I have found of 2116
chips is in a reference to the original IMSAI memory board.
So, my questions are: Are 2116 chips 3-rail? Are 4116 chips
equivalent? Does anyone have a source for 2116 chips, if they are not
equivalent? What about 2114 static ram (used in the video section of
the Exidy)? Same problems? Were they all three rail?
A general lecture on the nature of old memory chips and their use and
selection would be very helpful (hint to Tony Duell).
Thanks, Louis
3:11 p.m.
New subject: 2116 and other old memory chips
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4:04 p.m.
New subject: 2116 and other old memory chips
On Sat, 7 Jul 2001 01:11:11 +0100 (BST), Tony Duell wrote:
#>
#> I am in the process of attempting to repair, with Pete Turnbull's
#> invaluable guidance, an Exidy Sorcerer.
#>
#> The manual recites that the memory chips, depending on
configuration,
#> are 2104 (4k) or 2116 (16k).
#>
#> A casual perusal of chip sources shows that most begin their dynamic
#> ram sections with 4116 chips. The only mention I have found of 2116
#> chips is in a reference to the original IMSAI memory board.
#>
#> So, my questions are: Are 2116 chips 3-rail? Are 4116 chips
#
#As far as I can see, yes the 2116s are 3-rail and have the same
pinouts
#as 4116s. A lot of the time, various manufacturers made very similar
RAM
#chips with slightly different numbers (another example is the 2016
2K*8
#SRAM which is very similar to the 6116). Sometimes there were slight
#timing differences between various manufacturer's chips, often it
doesn't
#matter.
#
#I would be very suprised if the Sorceror doesn't work with 4116 DRAMs
in it.
#
#> equivalent? Does anyone have a source for 2116 chips, if they are
not
#> equivalent? What about 2114 static ram (used in the video section
of
#> the Exidy)? Same problems? Were they all three rail?
#
#The 2114 SRAM is single-supply rail (+5V only). Again, it was made by
#several companies (but I think most of the time it was called the
2114).
#It also happens to be the chip I've had the most failures from :-)
#
#>
#> A general lecture on the nature of old memory chips and their use
and
#> selection would be very helpful (hint to Tony Duell).
#
#Most of the time, RAMs are pretty generic. Match up the capacity, type
#(SRAM or DRAM) and number of pins, and you're close to finding a match
:-)
#
#In general, SRAMs were single-rail, +5V only. DRAMs were often 3-rail
up
#to and including the 16K bit parts. There were single-rail 16Kbit
DRAMs,
#but they are not that common, and they came out later than the 3 rail
parts.
#
#Most DRAMs have a multiplexed address bus (that's how you fit a 16K
RAM,
#needing at least 14 address lines, 1 data line, 1 write enable line
,and
#3 power lines into a 16 pin package). You send the address in 2 parts
and
#bring RAS/ and CAS/ low as appropriate. Some older 4K DRAMs, in 22 pin
#packages, have a normal address bus with 12 separate pins. Those 22
pin
#DRAMs are odd in othter ways, like needing a strobe pulse at 12V
levels.
#
#I am not sure exactly what you want to know, though. If you can say
what
#information you need, I'll try and dig out the databooks.
#
#-tony
This answers most of my questions, thanks. One further question. What
is the difference between "static" ram and "dynamic" ram, since both
are "volatile" ram? Or, putting it another way, what is "static"
about
"static" ram, since it changes as well?
Louis
4:24 p.m.
New subject: 2116 and other old memory chips
Static RAM requires simply that you apply address, control, and, if necessary,
data, and, so long as power is applied, the content remains stabile. Dynamic
RAM's rely on stored charge that gradually leaks off, and, therefore, must be
refreshed. On DRAMs like 4116's, this occurs when the nRAS strobe is raised at
the end of a row access. This writes the charge back to all the cells in that
row. Consequently, the length of the RAS precharge cycle is just as long, or
nearly so, as a read access cycle, as the data is written back to all the cells
in the row from the row buffers. The advantage of the DRAM is that it requires
much less silicon per bit, for a given geometry, so costs less (less silicon at
$XX/lb) per bit. The disadvantage is that, in the case of all the 16-pin
multiplexed address DRAMs, more logic and somewhat critical signal timing was
required. Later DRAMs followed the same general approach, though it's gotten
quite a bit more setup intensive in recent years.
Dick
----- Original Message -----
From: "Louis Schulman" <louiss(a)gate.net>
To: <classiccmp(a)classiccmp.org>rg>; "Tony Duell"
<ard(a)p850ug1.demon.co.uk>
Sent: Friday, July 06, 2001 7:04 PM
Subject: Re: 2116 and other old memory chips
On Sat, 7 Jul 2001 01:11:11 +0100 (BST), Tony Duell
wrote:
#>
#> I am in the process of attempting to repair, with Pete Turnbull's
#> invaluable guidance, an Exidy Sorcerer.
#>
#> The manual recites that the memory chips, depending on
configuration,
#> are 2104 (4k) or 2116 (16k).
#>
#> A casual perusal of chip sources shows that most begin their dynamic
#> ram sections with 4116 chips. The only mention I have found of 2116
#> chips is in a reference to the original IMSAI memory board.
#>
#> So, my questions are: Are 2116 chips 3-rail? Are 4116 chips
#
#As far as I can see, yes the 2116s are 3-rail and have the same
pinouts
#as 4116s. A lot of the time, various manufacturers made very similar
RAM
#chips with slightly different numbers (another example is the 2016
2K*8
#SRAM which is very similar to the 6116). Sometimes there were slight
#timing differences between various manufacturer's chips, often it
doesn't
#matter.
#
#I would be very suprised if the Sorceror doesn't work with 4116 DRAMs
in it.
#
#> equivalent? Does anyone have a source for 2116 chips, if they are
not
#> equivalent? What about 2114 static ram (used in the video section
of
#> the Exidy)? Same problems? Were they all three rail?
#
#The 2114 SRAM is single-supply rail (+5V only). Again, it was made by
#several companies (but I think most of the time it was called the
2114).
#It also happens to be the chip I've had the most failures from :-)
#
#>
#> A general lecture on the nature of old memory chips and their use
and
#> selection would be very helpful (hint to Tony Duell).
#
#Most of the time, RAMs are pretty generic. Match up the capacity, type
#(SRAM or DRAM) and number of pins, and you're close to finding a match
:-)
#
#In general, SRAMs were single-rail, +5V only. DRAMs were often 3-rail
up
#to and including the 16K bit parts. There were single-rail 16Kbit
DRAMs,
#but they are not that common, and they came out later than the 3 rail
parts.
#
#Most DRAMs have a multiplexed address bus (that's how you fit a 16K
RAM,
#needing at least 14 address lines, 1 data line, 1 write enable line
,and
#3 power lines into a 16 pin package). You send the address in 2 parts
and
#bring RAS/ and CAS/ low as appropriate. Some older 4K DRAMs, in 22 pin
#packages, have a normal address bus with 12 separate pins. Those 22
pin
#DRAMs are odd in othter ways, like needing a strobe pulse at 12V
levels.
#
#I am not sure exactly what you want to know, though. If you can say
what
#information you need, I'll try and dig out the databooks.
#
#-tony
This answers most of my questions, thanks. One further question. What
is the difference between "static" ram and "dynamic" ram, since both
are "volatile" ram? Or, putting it another way, what is "static"
about
"static" ram, since it changes as well?
Louis
9 Jul
9 Jul
4:04 p.m.
New subject: Correct installation of a 2716 eprom
Another simple question. When a standard single-rail 2716 is installed
in a computer, what do you do with the Vpp pin? Tie high, low, or
leave alone? If tying, what, if any value resistor should be used?
Is this answer different for masked ROMs or other EPROMS?
Is there a standard reference book or site that answers questions like
this? I don't want to wear out my welcome :-)
Louis
5:14 p.m.
New subject: Correct installation of a 2716 eprom
Louis Schulman wrote:
Another simple question. When a standard single-rail 2716 is installed
in a computer, what do you do with the Vpp pin? Tie high, low, or
leave alone? If tying, what, if any value resistor should be used?
For normal operation the Vpp pin should be set to Vcc (ie +5v)
Most semiconductor manufacturers have datasheets available on the web.
If you don't know where to look, then you can usually get a pretty good
set of relevant results from a search engine if you search for the right
keywords.
For example, if you go to www.google.com, search for:
2716 eprom datasheet
and follow the first link, then you will pretty soon find your way to:
http://batronix.com/electronic/datasheets/index.shtml
and then
http://batronix.com/pdf/m2716.pdf
which is what you were looking for.
10 Jul
10 Jul
10:53 a.m.
New subject: Correct installation of a 2716 eprom
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1:05 p.m.
New subject: Correct installation of a 2716 eprom
If you tie Vpp to Vcc through a 100-ohm resistor, you'll see that the device
uses the Vpp as a supply when it's selected. It will happily pull down that
100-ohm pullup. The device won't work under those circumstances.
On later EPROMs, i.e. the CMOS variety, you can use Vpp as an additional chip
select if you like. It's quite a common practice.
Dick
----- Original Message -----
From: "Tony Duell" <ard(a)p850ug1.demon.co.uk>
To: <classiccmp(a)classiccmp.org>
Sent: Tuesday, July 10, 2001 1:53 PM
Subject: Re: Correct installation of a 2716 eprom
Another simple question. When a standard single-rail 2716 is installed
in a computer, what do you do with the Vpp pin? Tie high, low, or
leave alone? If tying, what, if any value resistor should be used?
Connect Vpp to Vcc (+5V), with no resistor in series (i.e. a direct wire
connection). That's what I've always done anyway.
Is this answer different for masked ROMs or other
EPROMS?
With most EPROMs you link Vpp to +5V in read mode. Mask ROMs obviously
don't have Vpp line, and the pin is normally either unconnected (in which
case you can do what you like with it, within reason [1], including
connecting it to +5V), or sometimes it's another chip enable input. The
latter is often level selectable by an option set by the programming mask
(i.e. when the chip is mask-programmed, as well as the data being
defined, the active level of the chip select lines (active high or active
low) can also be set). Of course if the mask ROM has an active-low enable
pin there, you have to connect it to ground.
Is there a standard reference book or site that
answers questions like
this? I don't want to wear out my welcome :-)
What you need are the data sheets for the EPROM you are using. Most
semiconductor companies put the data sheets of their current parts on the
web in pdf format. Very rarely are obsolete data sheets made available in
this way.
It's worth obtaing all the old data books that you can find, since they
contain data sheets for the chips found in classic computers :-)
-tony
1:09 p.m.
New subject: Correct installation of a 2716 eprom
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7 Jul
7 Jul
9:17 a.m.
New subject: 2116 and other old memory chips
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2:20 p.m.
New subject: 2116 and other old memory chips
Is that also why static RAM is so much faster?
Peace... Sridhar
On Sat, 7 Jul 2001, Tony Duell wrote:
This answers
most of my questions, thanks. One further question. What
is the difference between "static" ram and "dynamic" ram, since both
are "volatile" ram? Or, putting it another way, what is "static"
about
"static" ram, since it changes as well?
OK...
Static RAM is made from flip-flops. Which means that when you write data
to it, you set some flip flops one way (for '1's) and some the other way
(for '0's). And the flip-flops remain in that state until either you turn
the power off or you write some other data to it.
Dynamic RAM is made from capacitors. Generally, a '1' is represented by a
charge on a capacitor, a '0' is a discharged capacitor. Writing data to
DRAM involves charging some capacitors and discharging others.
The problem is that all electronics has leakages. So the capacitors
discharge themselves (in a few milliseconds). So you have to read each
location periodically and write the data back again to 'refresh' the
charge on the capacitors. Most (all?) DRAMs have internal circuitry to
help with this (e.g. accessing a particular location will refresh a
number of locations -- perhaps all those with the same pattern in the
high-order half of the address). But you still have to do something -- on
'classic' DRAMs, you have to cycle the address inputs and apply RAS/
pulses (or at least that's the normal way). If you don't, you lose data.
That's the difference. The contents of static RAM are maintained as long
as power is applied. Dynamic RAM needs to be refreshed or it will forget.
-tony
3:53 p.m.
New subject: 2116 and other old memory chips
SRAMs were smaller in size, and simpler in architecture, though the elemental
memory structures were larger. The fast SRAMs were built for access time, at
the cost of power, mostly, aside from the die size. DRAMs were built for
capacity (number of bits) and density (pounds of silicon per bit) which
translated into cost. Slower SRAMs were built for simplicity of operation, as
there was always a market for devices that could be applied without a large
hardware overhead. DRAMs were built for the applications that justified a
larger overhead since there was a demand for large memory size in a limited
power, space and cost budget. SRAMs in small arrays were much cheaper as well
as being simpler.
Dick
----- Original Message -----
From: "Vance Dereksen" <vance(a)ikickass.org>
To: <classiccmp(a)classiccmp.org>
Sent: Saturday, July 07, 2001 5:20 PM
Subject: Re: 2116 and other old memory chips
Is that also why static RAM is so much faster?
Peace... Sridhar
On Sat, 7 Jul 2001, Tony Duell wrote:
This
answers most of my questions, thanks. One further question. What
is the difference between "static" ram and "dynamic" ram, since both
are "volatile" ram? Or, putting it another way, what is "static"
about
"static" ram, since it changes as well?
OK...
Static RAM is made from flip-flops. Which means that when you write data
to it, you set some flip flops one way (for '1's) and some the other way
(for '0's). And the flip-flops remain in that state until either you turn
the power off or you write some other data to it.
Dynamic RAM is made from capacitors. Generally, a '1' is represented by a
charge on a capacitor, a '0' is a discharged capacitor. Writing data to
DRAM involves charging some capacitors and discharging others.
The problem is that all electronics has leakages. So the capacitors
discharge themselves (in a few milliseconds). So you have to read each
location periodically and write the data back again to 'refresh' the
charge on the capacitors. Most (all?) DRAMs have internal circuitry to
help with this (e.g. accessing a particular location will refresh a
number of locations -- perhaps all those with the same pattern in the
high-order half of the address). But you still have to do something -- on
'classic' DRAMs, you have to cycle the address inputs and apply RAS/
pulses (or at least that's the normal way). If you don't, you lose data.
That's the difference. The contents of static RAM are maintained as long
as power is applied. Dynamic RAM needs to be refreshed or it will forget.
-tony
6 Jul
6 Jul
4:38 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
--- Tony Duell <ard(a)p850ug1.demon.co.uk> wrote:
The 2114 SRAM is single-supply rail (+5V only). Again,
it was made by
several companies (but I think most of the time it was called the 2114).
It also happens to be the chip I've had the most failures from :-)
I, too, have had these fail numerous times. Much more so than other SRAMs
or any DRAMs. The only ones that came close were from the same era: 4096
DRAMs - I have them on some LSI-11 boards and inside a Z-80-based Gorf.
When I first got all the parts together to refurb a full-sized Gorf machine,
the internal tests showed a memory fault on one of the DRAM boards, covered
in 4096 chips.
I use the LSI-11 CPU, a COMBOARD (for its memory mapping/DMA engine) and
a Fluke tester to check the 4K DRAMs - plug the COMBOARD on the Qbus,
put the test RAMs on the LSI-11 board, plug the Fluke emulator/tester
in the 68000 socket on the COMBOARD, fire it all up, hit the DMA enable
bit on the COMBOARD, then through the Fluke, test a range of 68K memory
that corresponds to the appropriate range of Qbus memory addresses and
voila - a 4096 tester with about $25K-new-cost worth of test gear. (The Qbus
COMBOARD memory map is divided into 4 regions, RAM, shared-memory, I/O and
ROM. There are 22 bits of 68K space available to map each and every Qbus
location into some valid local address. Who needs mapping registers! No
FUBAR on a Qbus!)
The first COMBOARD used 2114 SRAMs because they were more reliable than
Intel's DRAMs of the day (plus the XC68000 would occasionally enter a
microcode fault and reset, causing Z-80-style bus-driven refresh mechanisms
to pause too long, letting all the bits leak out).
-ethan
=====
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6:45 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
I've still got almost all the RAM chips that have ever failed on me, and, aside
from one thoroughly voltage-abused board of small
SRAMs, I've got very few that
are smaller than 64Kbits. There are a couple of
21L02's a couple of different
2114/2149 types, a dozen or so 4116-types, and perhaps a couple of 6116's. By
contrast, I have a paper box about half full of SIMMs and DIMMs, not to mention
VRAMs, etc, some of which may be separated from their healthy bretheren if I
feel ambitious or desperate some day. The pattern they seem to follow is an
order n^2 pattern, where the number of bits squared in a single device seems to
be reflective of the risk of failure. That means that a SIMM with 64 MB, one of
which I've got right here, with eight EDO DRAMs on it, is 8 times as likely to
fail as one with one of the same device type, but the device itself seems to be
about 16 times as likely to fail as one a fourth its size. As each shrink in
the geometries is brought forth, the industry claims its failure rate per bit
goes down, but I've seen nothing of the sort. It seems that the failure rate,
for DRAMs anyway, goes up as the square of the number of bits per device. Also,
a two-IC SIMM seems about a fourth as likely to fail as one with eight of the
same size device on it. That fits, doesn't it?
While I don't dispute Tony's experience, mine has been somewhat different.
I've
still got the first SRAM boards I ever bought for the S-100 bus, all with 4Kbit
SRAMs (2147's), and those have never (yet) had a failure. Likewise, I still
have the first S-100 board with 32 WIDE SRAMs (6116's) on it, and it's also
never experienced a failure. Oddly enough, my S-100 DRAM boards using 4164's
have had no failures either, though there are more of them. OTOH, my 2 Ampro
Little Boards, have lost over a dozen 4164's over the 15+ years I've had 'em.
If one uses only 1000 or so part per week, one doesn't get a complete picture of
the real failure rates of memory devices, if you test 40 boards at a time, each
with 288 DRAMs on it, and test and ship 100+ boards a week, then you get a
picture. Believe me, it's different from what one gets in the basement personal
computer and electronics lab.
Dick
----- Original Message -----
From: "Ethan Dicks" <ethan_dicks(a)yahoo.com>
To: <classiccmp(a)classiccmp.org>
Sent: Friday, July 06, 2001 7:38 PM
Subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old
memory chips)
--- Tony Duell <ard(a)p850ug1.demon.co.uk> wrote:
Since the MC68000 and its kin didn't have a Z-80-style bus-driven refresh
mechanism, this must have been implemented in external hardware that was turned
off when an exception was encountered, or it was done in software, which was
apparently not used in the exception handler.
The 2114 SRAM is single-supply rail (+5V only).
Again, it was made by
several companies (but I think most of the time it was called the 2114).
It also happens to be the chip I've had the most failures from :-)
I, too, have had these fail numerous times. Much more so than other SRAMs
or any DRAMs. The only ones that came close were from the same era: 4096
DRAMs - I have them on some LSI-11 boards and inside a Z-80-based Gorf.
When I first got all the parts together to refurb a full-sized Gorf machine,
the internal tests showed a memory fault on one of the DRAM boards, covered
in 4096 chips.
I use the LSI-11 CPU, a COMBOARD (for its memory mapping/DMA engine) and
a Fluke tester to check the 4K DRAMs - plug the COMBOARD on the Qbus,
put the test RAMs on the LSI-11 board, plug the Fluke emulator/tester
in the 68000 socket on the COMBOARD, fire it all up, hit the DMA enable
bit on the COMBOARD, then through the Fluke, test a range of 68K memory
that corresponds to the appropriate range of Qbus memory addresses and
voila - a 4096 tester with about $25K-new-cost worth of test gear. (The Qbus
COMBOARD memory map is divided into 4 regions, RAM, shared-memory, I/O and
ROM. There are 22 bits of 68K space available to map each and every Qbus
location into some valid local address. Who needs mapping registers! No
FUBAR on a Qbus!)
The first COMBOARD used 2114 SRAMs because they were more reliable than
Intel's DRAMs of the day (plus the XC68000 would occasionally enter a
microcode fault and reset, causing Z-80-style bus-driven refresh mechanisms
to pause too long, letting all the bits leak out).
-ethan
=====
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8:43 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
--- Richard Erlacher <edick(a)idcomm.com> wrote:
This is slightly before my time, but I was told that the earliest 68000
designs that used DRAMS, used a derivative of the Z-80 scheme because
the designers of the time were used to it. I didn't mean to imply that
the 68K had some kind of magical in-built DRAM refresh support.
The microcode faults I was told about for the XC68000 (not MC68000) would
lock things up tight for dozens of clock cycles, then go right back at it,
as it nothing ever happened. It was strictly internal to the CPU and caused
by bugs in the first run. Your software never knew what hit it unless it
was checking timings against an external clock.
By the time I personally touched a 68000, these kinks were long worked out
(except for knowing that one needs to put low-ohmage resistors (30-60 Ohms)
in series with the refresh lines from a DRAM controller when attempting
to refresh several dozen DRAMs (4164s in this case). I chuckled when I
saw those same resistors in the front memory cartridge of an Amiga 1000.
They at least got them in there by the time their production started. I
added hundreds of 68 Ohm resistors to the first production run of COMBOARD-II
rev 0s. Once one of those came back from the soldering house, I think it
took 3 hours of bench time to apply all the ECOs. Good thing they were
already expensive.
-ethan
=====
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The first
COMBOARD used 2114 SRAMs because they were more reliable than
Intel's DRAMs of the day (plus the XC68000 would occasionally enter a
microcode fault and reset, causing Z-80-style bus-driven refresh mechanisms
to pause too long, letting all the bits leak out).
Since the MC68000 and its kin didn't have a Z-80-style bus-driven refresh
mechanism, this must have been implemented in external hardware that was
turned
off when an exception was encountered, or it was done in software, which was
apparently not used in the exception handler.
10:16 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
see below, plz.
Dick
----- Original Message -----
From: "Ethan Dicks" <ethan_dicks(a)yahoo.com>
To: <classiccmp(a)classiccmp.org>
Sent: Friday, July 06, 2001 11:43 PM
Subject: Re: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other
old memory chips)
--- Richard Erlacher <edick(a)idcomm.com> wrote:
> > The first COMBOARD used 2114 SRAMs because they were more reliable than
<snip>
This is slightly before my time, but I was told that the earliest 68000
designs that used DRAMS, used a derivative of the Z-80 scheme because
the designers of the time were used to it. I didn't mean to imply that
the 68K had some kind of magical in-built DRAM refresh support.
It would have been difficult for them to do, since the CPU didn't have that
capability. The Z80 had a hardware refresh cycle built into its operating
circuitry. It had a refresh counter (though only 7 bits) which was placed on
the address bus while the CPU decoded an opcode.
The microcode faults I was told about for the XC68000 (not MC68000) would
The XC68000 was the designator for the earliest units, primarily engineering
samples of the various masks, though mine, (1978-79) from an early mask design
later obsoleted, were marked with the MC68000 designation and a mask number.
One of these had bus timing spec's that allowed it to operate at speeds
exceeding those of later masks at nearly twice the clock rate.
lock things up tight for dozens of clock cycles, then go right back at it,
as it nothing ever happened. It was strictly internal to the CPU and caused
by bugs in the first run. Your software never knew what hit it unless it
was checking timings against an external clock.
Anything's possible, but MOT didn't publish anything about this feature in
the
various engineering notes the published to characterize the various masks they
produced. Since the original plans were to use the MC68K with cache, support
for DRAM refresh would probably have gotten in the way. Within months of the
release of the 68K, 64K DRAMs that worked as fast as the MC68K could digest the
data became available, and, as the decision had been made to abandon the masks
with timing capable of exceeding the timing for those devices, cacheless
DRAM-based memory systems could be designed to run at full speed.
By the time I personally touched a 68000, these kinks
were long worked out
(except for knowing that one needs to put low-ohmage resistors (30-60 Ohms)
in series with the refresh lines from a DRAM controller when attempting
to refresh several dozen DRAMs (4164s in this case). I chuckled when I
saw those same resistors in the front memory cartridge of an Amiga 1000.
They at least got them in there by the time their production started. I
added hundreds of 68 Ohm resistors to the first production run of COMBOARD-II
rev 0s. Once one of those came back from the soldering house, I think it
took 3 hours of bench time to apply all the ECOs. Good thing they were
already expensive.
-ethan
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7 Jul
7 Jul
4:34 a.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
--- Richard Erlacher <edick(a)idcomm.com> wrote:
Yes. My boss still has ours. It has a serial number (#424) engraved on
the lid. We were told that the first 400 were for internal Motorola use.
-ethan
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It would have been difficult for them to do, since the
CPU didn't have that
capability. The Z80 had a hardware refresh cycle built into its operating
circuitry. It had a refresh counter (though only 7 bits) which was placed on
the address bus while the CPU decoded an opcode.
I realize that. I think what I was being told about was a refresh system
that depended on some line out of the CPU to tell when it was safe to do
a refresh cycle. The CPU locks up temporarily and blocks the refresh
accidentally until it recovers.
The microcode faults I was told about for the XC68000 (not MC68000) would
The XC68000 was the designator for the earliest units, primarily engineering
samples of the various masks...
9:34 a.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
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3:31 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
While 2114's weren't the only common I/O SRAMs, they were the first in really
broad usage. I'd guess that the reason for so many problems associated with
them was that it took a while for people to figure out how to use common I/O
devices in fairly tightly timed circuits such as shared video refresh memory in
a microprocessor-based system. The timing looked quite simple, but between
setup and hold time restrictions and the correct timing of the nWE line, it was
pretty easy for folks to get into contention problems. I suspect that was a
pretty significant factor in the frequency of malfunction with these devices.
They were really popular in video games, many of which weren't terribly well
designed, since that would have run up their cost. They were popular, though,
because they took up less space than an equvalent number of 2102's, which had
separate data in and out.
As for failures, I don't remember lots of trouble with them. I suspect that
they were easier to use, and hence, less prone to misuse, in systems with a
single write line rather than a write and a read, however.
Dick
----- Original Message -----
From: "Tony Duell" <ard(a)p850ug1.demon.co.uk>
To: <classiccmp(a)classiccmp.org>
Sent: Saturday, July 07, 2001 12:34 PM
Subject: Re: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other
old memory chips)
> While I don't dispute Tony's experience,
mine has been somewhat different.
I've
My comments (about the unreliability of 2114s) are not based on a real
scientific survey. It's just that I have had an excessive number of 2114s
fail. The most recent case was an HP82163 HPIL video interface. It was
working a few months back, I tried it again and got some garbled
characters. Writing to one position on the screen would sometimes cause
another character elswehere on the screen to be changed.
It looked like an addressing error for the top 4 bits of video memory.
There was a pattern to the corruption -- the corrupted character would
have the bottom 4 bits left alone, but the top 4 bits sent to the same
states as those for the character you'd just written.
It was either a very obscure fault in the HP-custom video chip, or a
video RAM playing up. The video RAMs were 1K*4 devices, 18pin DIL, with
HP numbers. But they were really 2114s. I changed one of them (for once I
picked the right one first time), and the unit worked again.
It's got to the point, I am afraid, where if I see a board with 2114s on
it, and the fault could well be RAM-related, then I test an/or change the
2114s.
I have had other RAM fail. A DEC LA324 where all the SRAM chips (I think
it's 2 32K*8 and 1 8K*8 one) failed at once. And I've had the odd 4116 or
4164 die. But they seem to be more reliable than 2114s...
> If one uses only 1000 or so part per week, one doesn't get a complete
picture of
> the real failure rates of memory devices, if you
test 40 boards at a time,
each
Very true.
However, I'll still suspect 2114s if the fault can be memory-related :-)
-tony
8 Jul
8 Jul
9:05 a.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
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12:07 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
A big part of the question would be whether the devices failed permanently, or
just failed in that particular application. Hard failures with respect to
address lines were common, and there were popularly distributed memory tests
just for that sort of failure.
I often ran into failures, not only with 2114's but in general, that didn't
persist in a given device, and where replacement with another new or presumed
healthy device would, eventually produce the same failure mode. I didn't
attribute this sort of thing to device failure, however.
It's pretty easy to develop the opinion that this device or that is more prone
to failure than some other. I was convinced for a time that 'LS244's had an
abnormally high failure risk associated with them, likewise, 1489's. However,
it's often the way in which they're used, in these examples, certainly, that
makes the difference, as both devices were often used in connection with
external cables and equipment.
Have you any examples of how you determined that there was an addressing
failure? Was an address input shorted to some other line or supply on the 2114?
I've seen that sort of thing happen with other memory devices, so it's certainly
conceivable with these as well.
The main problems I've run into myself have related to address-setup-to-nWE and
data-valid-to-nWE rising edge, as well as write-data hold times, (often violated
with 6502 and 68xx processors, BTW) which clearly is an application error and
not a device failure. The relationship between nCS, nOE, and nWE to the
settling of addresses and data can be pretty touchy in tightly timed circuits
such as those used for sharing memory between a microprocessor and a video
refresh logic set. That was one pretty common application in which I saw them
fall down. I bought a bunch of Intersil 7114-HCC types (70 ns, so, MUCH faster
than was normally required of 2114's) just to prove that a circuit was badly
designed for the desired memory speed (memory speed determined cost, and cost
targets were often paramount). The problems often went away with the faster
RAM.
Dick
----- Original Message -----
From: "Tony Duell" <ard(a)p850ug1.demon.co.uk>
To: <classiccmp(a)classiccmp.org>
Sent: Sunday, July 08, 2001 12:05 PM
Subject: Re: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other
old memory chips)
>
> While 2114's weren't the only common I/O SRAMs, they were the first in
really
<snip>
separate data
in and out.
As for failures, I don't remember lots of trouble with them. I suspect that
they were easier to use, and hence, less prone to misuse, in systems with a
single write line rather than a write and a read, however.
I don't think the problems I've exeprienced with 2114s are due to misuse.
For one thing, the chips worked fine for several years (i.e. they didn't
fail a few minutes/hours after swtich-on). The replacements also worked fine.
Most of the faults I've had have been addressing errors. One address line
does nothing (so data written to 1 location shows up somewhere else). I
can accept that violating the timing specs could cause
contention between the output buffers in the 2114 and system data bus
drivers. But if it did any damage, it would most likely cook one of the
data output buffers in the 2114. Not an address input.
-tony
2:03 p.m.
New subject: Lack of robustness with 1K and 4K RAM chips (was Re: 2116 and other old memory chips)
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6 Jul
6 Jul
4:05 p.m.
New subject: 2116 and other old memory chips
I don't think the 2116's (now, this is from memory cells undisturbed in probably
20 years ... so be careful ... ) are much different from 2117's, which I've
routinely interchanged and mixed with 4116's.
The 2114's are single-supply 1Kx4-bit SRAMs, while the 2116's are dynamic and
3-rail. The single supply Intel 16-kbit DRAMs are the 2118's.
The TI number for the 2114's was TMS-4045 and other vendors had part numbers
similar to the 2114, e.g. 9114, 7114, etc. National had a 5290 instead of the
4116 designation, but the parts were similar. There are some "special" parts
that need to be noted, particularly the 4115, from Mostek. These were devices
the gate capacitance of which wasn't enough to hold their charge reliably for
the entire 2 ms refresh interval, so they had the special designation of 4115 to
indicate they required more frequent refresh, which often wasn't an issue, since
they were used in applications where they were cycled very frequently because of
video refresh or other system activities that cycled the row addresses faster
than the 2 ms per 128-byte cycle requirement of 4116's.
Intel's memory numbering was a mite confusing, as they had an old SRAM line with
numbers like 2115 and 2125, which were 1kx1 fast (15-25 ns) srams while the
2114's were slow 1kx4's. They had lots of numbers, and the numeric series
designation was often not at all indicative of the nature of the part.
I've still got quite a few 4116's (200 ns Tacc, mostly) that I'll donate for
the
cost of shipping, to folks with REAL applications for them. I'm not interested
in shipping them in quantity to folks building pop-art with 'em, however, as
these work, and they don't make 'em anymore.
Dick
----- Original Message -----
From: "Louis Schulman" <louiss(a)gate.net>
To: <classiccmp(a)classiccmp.org>
Sent: Friday, July 06, 2001 5:54 PM
Subject: 2116 and other old memory chips
I am in the process of attempting to repair, with Pete
Turnbull's
invaluable guidance, an Exidy Sorcerer.
The manual recites that the memory chips, depending on configuration,
are 2104 (4k) or 2116 (16k).
A casual perusal of chip sources shows that most begin their dynamic
ram sections with 4116 chips. The only mention I have found of 2116
chips is in a reference to the original IMSAI memory board.
So, my questions are: Are 2116 chips 3-rail? Are 4116 chips
equivalent? Does anyone have a source for 2116 chips, if they are not
equivalent? What about 2114 static ram (used in the video section of
the Exidy)? Same problems? Were they all three rail?
A general lecture on the nature of old memory chips and their use and
selection would be very helpful (hint to Tony Duell).
Thanks, Louis
7 Jul
7 Jul
5:48 a.m.
New subject: 2116 and other old memory chips
2115 drams are 3 rail.
2114 srams are 5 volts only.
2104 drams are also 3 rail.
Louis Schulman wrote:
I am in the process of attempting to repair, with Pete
Turnbull's
invaluable guidance, an Exidy Sorcerer.
The manual recites that the memory chips, depending on configuration,
are 2104 (4k) or 2116 (16k).
A casual perusal of chip sources shows that most begin their dynamic
ram sections with 4116 chips. The only mention I have found of 2116
chips is in a reference to the original IMSAI memory board.
So, my questions are: Are 2116 chips 3-rail? Are 4116 chips
equivalent? Does anyone have a source for 2116 chips, if they are not
equivalent? What about 2114 static ram (used in the video section of
the Exidy)? Same problems? Were they all three rail?
A general lecture on the nature of old memory chips and their use and
selection would be very helpful (hint to Tony Duell).
Thanks, Louis
6:48 a.m.
New subject: 2116 and other old memory chips
I have to disagree ... i2115's are open-drain versions of the tri-state i2125,
and both of these are single-supply 1k x 1 SRAMs. If you plug a 2115 into a
2116/2117 application, you'll quickly become aware of the differences since the
single-supply 2115's Vcc will be at gnd, and its gnd will be at +12, its nCS
will be at -5, and the A5 input will be connected to +5. I would expect the
package to pop within less than 10 seconds. I did verify this information from
the 1987 Intel Memory Components Handbook. 16K DRAMs were no longer of
interest, and, since Intel actually never manufactured them anyway, simply
packaging someone else's parts with their brand label, there was no need for
them to include the 3-rail 4116-equivalents in their databook.
Intel did take a stab at selling (I don't know whether they attempted to build
them themselves.) Single rail 16-K DRAMs, the 2118's, which were also touted as
the fastest DRAMs on the market at that time. With the rapidly approaching
availability of the 4164's, this was a stepping stone to the larger memory
arrays that were of great appeal to the users of the new 16-bit CPU's, allowing
board makers to design boards with single supplies. However, the Intel DRAM
controllers of the 16K era, i.e. the i3242/i3480 combination, didn't deal with
mulitiplexing 16 bits of address, so would-be designers of 64K DRAM-compatible
memory boards had either to wait for the new generation of DRAM controllers, or
to design their own multiplexing/refresh-address-generation logic from TTL
SSI/MSI, or perhaps PALs.
Dick
----- Original Message -----
From: "Bob Shannon" <bshannon(a)tiac.net>
To: <classiccmp(a)classiccmp.org>
Sent: Saturday, July 07, 2001 8:48 AM
Subject: Re: 2116 and other old memory chips
2115 drams are 3 rail.
2114 srams are 5 volts only.
2104 drams are also 3 rail.
Louis Schulman wrote:
I am in the process of attempting to repair, with
Pete Turnbull's
invaluable guidance, an Exidy Sorcerer.
The manual recites that the memory chips, depending on configuration,
are 2104 (4k) or 2116 (16k).
A casual perusal of chip sources shows that most begin their dynamic
ram sections with 4116 chips. The only mention I have found of 2116
chips is in a reference to the original IMSAI memory board.
So, my questions are: Are 2116 chips 3-rail? Are 4116 chips
equivalent? Does anyone have a source for 2116 chips, if they are not
equivalent? What about 2114 static ram (used in the video section of
the Exidy)? Same problems? Were they all three rail?
A general lecture on the nature of old memory chips and their use and
selection would be very helpful (hint to Tony Duell).
Thanks, Louis
8415
days inactive
8422
days old
25 comments
8 participants
participants (8)
-
ard＠p850ug1.demon.co.uk -
bshannon＠tiac.net -
edick＠idcomm.com -
ethan_dicks＠yahoo.com -
louiss＠gate.net -
michael_davidson＠pacbell.net -
tim.mann＠compaq.com -
vance＠ikickass.org