Chuck wrote:
For those wondering about the notion of an "optimizing" assembler, one
has to realize that 650 instructions were executed from a drum and were of
the "1+1" addressing type. Calculating the optimal address of the next
instruction was very tedious and a perfect task for automatic optimization.
Many moons ago I did some programming on a process control computer made by 3M.
The machine was a 24-bit word, bit-serial, transistorized machine with drum as main
memory. Each instruction contained both the operand address and the next instruction
address (in block/track/sector numbers). Depending on the timing of the instruction, the
optimal address for the operand and next instruction were calculated based on offsets
given in the instruction set summary.
There were no index registers on this machine, only a single accumulator register
(implemented as a shift-register). The only way you could do table operations or jumps
based on evaluation of an expression was self-modifying code. However, this was tricky,
if you wanted the code to run as efficiently as possible (minimizing waiting for rotation
of the drum), you had to do optimization calculations as part of the self-modifying code.
The other tricky part was the you had to be aware of track and sector numbers and
properly deal with overflowing, e.g., max sector number was , IIRC, 30(octal) , so if you
added 1 to the address, you'd have to clear the sector to zero, and add one to the
track address, also being aware that the track number could overflow.
I learned a lot from that old machine.
Rick Bensene
The Old Calculator Museum
http://oldcalculatormuseum.com