At 03:24 PM 9/13/2004, you wrote:
After about 4 hours, I was back in operation. Why is
it
that the latching and flopping ttl parts seem to have such a
high failure rate?
Probably because the output wasn't very well isolated from the input on
those "MSI" (medium scale integration) parts.
They were pushing to get 4 FF in one package and didn't buffer the output.
According to my trusty (and rusty) orange TI TTL Data Book, there wasn't
any isolation at all.
Too much fanout degrades the device and ringing on the lines leads to
eventual failure.
Ed K.