Tim Shoppa wrote:
cycle-accurate
MAME processor cores.
For a Unibus PDP-11, what is "cycle-accurate"? Memory access
waits until the memory says it's done. I suppose you could come
up with some numbers not too far off for some memory implementation
and build around that. (don't forget modify as well as read and
write timings!)
Tim.
Wouldn't it be hard to tell, if you were unsure how accurate the timing was?
How do you know your timing routine is actually responding within a
certain time?
I'm reminded of my late father testing a homebrewed frequency counter,
finding it to be inaccurate, using it to measure its own 1MHz source
(which of course read bang on 1MHz), then realising that this was silly
and he'd need to borrow another frequency counter from work to discover
that his 1MHz crystal seemed closer to 900kHz...
Gordon.