Thanks for the concise reply.
Speed is not an issue. J11 speed would be just fine.
Rod
-----Original Message-----
From: cctech-bounces at
classiccmp.org [mailto:cctech-bounces at
classiccmp.org]
On Behalf Of Walter F.J. Mueller
Sent: 26 June 2010 21:24
To: cctech at
classiccmp.org
Subject: RE: yet another pdp-11 in fgpa
RodSmallwood" <rodsmallwood at btconnect.com> wrote:
How difficult would it be to extend one of these FGPA
PDP-11's to be put
on a quad DEC board and be a plug in replacement for say an 11/93 or
11/94 CPU. (M8981-AA OR 11/91-BA)?
Rod
Hi Rod,
possible and feasible, but requires three tasks to be addressed:
1. an adapter board is needed to connect the FPGA development
boards (holding the FPGA and memory) to the UNIBUS or QBUS.
Main active part of this adapter board are the bus transceiver
for UNIBUS or QBUS.
2. The UNIBUS or QBUS bus interface logic can be added to the
FPGA. Given that the system clock period is small compared
to typical times of these buses it is quite simple and
straight forward to implement such a bus interface.
3. the current w11a implementation doesn't support bus masters
on the I/O bus. DMA transfers from disk/tape devices are
currently emulated. Next versions of the FPGA implementation
however will add this functionality.
But keep in mind: the current FPGA implementation isn't tremendously
faster than a J11.
Walter