ETA-10

I've been reading about the ETA-10 systems, and I have some questions that I hope the folks can clear up for me: The wikipedia page: http://en.wikipedia.org/wiki/ETA10 claims that the designers were expecting a theoretical 4x speedup from cooling the CMOS from room temperature (~300K) to ~90K, but only attained a 2x speedup in practice. None of the sources I can find mention the expected 4x speedup; many mention that a 2x speedup was obtained; some also mention that the originally advertised cycle time was 5ns, and that only 7ns was ever achieved. Is there any basis for the wikipedia claim that a 4x speedup was expected? If so, what's the physics behind that expectation? Why would the theoretical performance not be attainable in practice? The most interesting references I've found so far are: http://www.museumwaalsdorp.nl/computer/en/eta10p.html http://www.ed-thelen.org/comp-hist/super-users-view.html http://yarchive.net/comp/eta_peglar.html There's also an article at ieee that I don't have access to: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=30952 One last question: are folks aware of any other high performance computing systems that shipped (to customers, plural :-) to with cryogenic cooling? Alexey