8 Feb
2010
8 Feb
'10
11:26 a.m.
AFAIK, all of our HDL stuff at work is done in VHDL.
________________________________
From: Jos Dreesen <jdr_use at bluewin.ch>
To: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
Sent: Mon, February 8, 2010 12:27:48 PM
Subject: Re: VHDL vs Verilog
I remember the Algol-FORTRAN cross-pond war of the 60s
and 70s. :)
Now I wonder, "who won?" :)
--Chuck
Nobody won....
For the HDL languages, both VHDL and Verilog are US creations.
I have no idea why Europe prefers VHDL, and US prefers Verilog.
Jos