28 Apr
2015
28 Apr
'15
12:37 p.m.
Am 28.04.2015 um 20:32 schrieb Noel Chiappa:
Thanks for that effort!
The M9312 code should be similar, at least it may expose some ideas.
For reference, it is listed here:
http://bitsavers.trailing-edge.com/pdf/dec/unibus/K-SP-M9312-0-5_Aug78.pdf
http://bitsavers.trailing-edge.com/pdf/dec/unibus/K-SP-M9312-0-7_Aug78.pdf
http://bitsavers.trailing-edge.com/pdf/dec/unibus/MP00617_M9312.pdf
from what
I've seen so far, the code tends to loop on error, not halt.
So I lied: it turns out that some of the later tests (in the extended tests -
JSR, memory) do in fact halt on error.
I realize it's not needed immediately now (Josh having solved his problem),
but I've got the low part (diagnostics and TA11 boot) done, working on the
top part now. Here's what I have so far:
http://ana-3.lcs.mit.edu/~jnc/tech/pdp11/M9301-YA.mac
I haven't densely commented the CPU tests as they seemed, at first glance,
pretty non-complicated. The memory diagnostics are pretty inscrutable, I
don't really understand them yet (may not bother).
The top part (console and othr boots) - hoo boy, talk about 'sphagetti
code'!! I think there's a picture of this in the dictionary when you look
that term up. Very, very ugly code. That part may take a while...
Or forever :-) The coolest thing I ever saw is the M9312 MSCP boot rom,
in 23-76a9.lst
There four words for MSCP S1..S4 registers are encoded as BPL and BLT
opcodes. The controllers DMA base addr is set to 002404, just because
this is a "BLT 3$" branch they need.
Our "Optimizing compilers" have a long way to go ...
Joerg
Noel