1 Nov
2017
1 Nov
'17
5:59 a.m.
On Oct 31, 2017, at 5:59 PM, allison via cctalk
<cctalk at classiccmp.org> wrote:
... FYI rope core was basically many
transformers either with a wire
in for the bit or wire around for the not bit. The cores for rope
didn't change magnetic state like
coincident current cores of the bistable type as that allowed read write
but was DRO (destructive
read out with re-write) which is the more familiar core and why it had a
shorter read time and a
longer cycle time between reads.
Actually, that's not accurate. Core rope memory (Apollo Computer style) does use
memory cores. You can find it described well on a web page by Brent Halpern that
discusses that and other (transformer style) memories. In core rope memory, the selected
core has its state changed by the combined select currents, and then it delivers pulses to
whichever sense lines are threaded through that core when the core is reset again.
The Electrologica X1 has a core ROM that also uses memory cores, but in a different way
than core rope.
paul