Tony Duell beat me to this when he wrote:
"There have been many devices which implemented the IEEE-488 bus (GPIB,
HPIB) using a standard parallel interface chip like the 6821 or 6522
together with buffers."
My Osborne 1 (Z80, 64K, CP/M, 5 1/4 floppies, tan case, '82) labeled
their parallel port "IEEE-488" (aka HP-IB) and wrote low level routines
for the eight basic HP-IB commands into the bios. They used a 6821 PIA
to drive the port, an interesting mixing of chip families. My computer
THat doesn't really suprise me. To handle IEEE-488 you need (a) to be
able to control the direction of some of the lines individually (IFC is
an output on the controller, an input on everything else, etc) and (b)
need to be able to change the direction of the lines without affecting
anything else.
Intel's 8255, possibly the worst parallel port chip ever, can do neither.
The direction of all the port A lines has to be the same (and ditto for
port B), while the direction of port C can be set on a nybble basis.
Worse than that, though, is the fact that any write to the mode control
register will set all output lines to 0 (again, the worst possible choice
-- a floating TTL input will assume a '1' state, so a TTL input connected
to an 8255 line set as an input will be a '1'. As soon as you select that
line to be an output, it becomes a '0'. You have to design external
hardware that will behave sensibly if all the lines are '1's or if
they're all '0's.).
-tony