26 Dec
2007
26 Dec
'07
5:41 p.m.
Tom Watson wrote:
If you decide to make up a delay line to hold CPU
data, try a prototype using
shift registers. They are a bit easier to make up, and often the chips are
available. The problem is that they come in weird (at times) sizes (132, 80,
and the like). I'll leave it to the reader to determine the usability of odd
sizes and their original use.
What about DUAL ported memorys clocked with delay
line speeds?