29 Jan
2021
29 Jan
'21
1:12 p.m.
On 1/29/21 11:40 AM, Nemo Nusquam via cctalk wrote:
On 29/01/2021 14:20, Fred Cisin via cctalk wrote:
It was the result of sub-word addressable architecures.
Most old (pre S/360) digit/character-addressable architectures were
big-endian (i.e. higher-order characters occupied lower addresses)
Even PDP-11 isn't strictly little-endian, though Intel X86 definitely is.
Numbering of bits in a word is also interesting. Is the high order bit
in a 64 bit word, bit 0 or bit 63? Both conventions have been employed.
This really gets interesting on bit-addressable architectures. STAR for
example, is bit addressable, but big-endian, with alignment of data
dependent on the data type (e.g. bytes must have the lower 3 bits of
their address as 000; halfwords as 00000 and so on. However, it's
possible to extract any group of bits from a bit-addressed datum.
--Chuck
--Chuck
We don't need another
BIG-endian/little-endian debate!
(when a 16 bit number is stored in bytes, does the high order byte
come first, or the low order byte?)? (cf. intel V Motorola)
Amen to that (but did
it not originate with DEC vs. IBM?)
N.