11 Jun
2010
11 Jun
'10
3:08 p.m.
On 10/06/10 23:13, Keith wrote:
My original microcontroller implementation was
3.2-4.2, 5.2-6.2, and
7.2-8.2.
You're using fixed-position analysis? That is, "if the pulse was between
X and Y us after the last pulse, it was a 01" and so on?
The problem with that is you'll have issues with Instantaneous Speed
Variation (and possibly Continuous Speed Variation). Basically:
* A floppy drive motor does not rotate at a constant speed.
* Some drives are faster than others (this is CSV)
* The friction between the disc and the head (and/or the disc liner)
can, will and *does* make the motor slow down. The variations in this
are called "ISV".
This is why a PLL is required -- to keep track of the ISV and eliminate
it (or get close to eliminating it) from the measurements.
My approach has been very successful(easily 95%+), but
it makes me
wonder about Phil's DiscFerret dynamic adaptive approach where a sample
of the incoming data defines the ranges.
DFA (DiscFerret Analyser) gets a similar success rate. I'm having issues
setting the coefficients for the "soft-PLL" -- make the PLL too slow and
it misses ISV, make it too fast and it'll track the data not the ISV.
You could probably implement a version of the PLL from the WDC 1797
appnote if you wanted -- that should be fairly easy to do. Here are a
few references which might help out:
ftp://ftp.eskimo.com/u/m/mzenier/AN917.pdf -- Motorola AN917. This is
read-channel stuff mostly, but IIRC it has a bit about encoding too.
ftp://ftp.eskimo.com/u/m/mzenier/cd-8002-1.pdf -- "Encoding/Decoding
Techniques Double Floppy Disc Capacity" by Hoeppner and Wall. Computer
Design, Feb 1980. A great little introduction to MFM data storage.
<http://bitsavers.org/pdf/westernDigital/FD179X_Application_Notes_Jun80.pdf>
-- WD FD179x Application Notes. A couple of data separator designs, and
some of the background info.
<http://www.analog-innovations.com/SED/FloppyDataExtractor.pdf>
Jim Thompson at Analog Innovations came up with a neat little data
separator called a "phase jerked loop" -- this is the schematic of a PJL
data separator, similar to the datasep engine used in the DiscFerret.
Difference is that the DF's separator is a synchronous design, while the
PJL is partially asynchronous.
I seem to recall there being a (WD?) application note or datasheet that
basically said one of the WD controller chips' built-in data separators
shouldn't be used because it wasn't reliable... I wish I could find a
reference for that.. :)
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/