12 Mar
2018
12 Mar
'18
7:49 a.m.
As the most obvious example of the impedance mismatch between 370
architecture and 68000 microarchitecture, the 68000 is hardwired to have
eight each data and address registers, not sixteen GPRs, and microcode
can't easily paper over that.
Similarly, the 8087 microarchitecture has hardwired support for binary
floating point normalization, and microcode can't efficiently force that to
do radix 16 normalization.
Both problems could be surmounted (inefficiently) with enough microcode,
but the chips were designed with no significant extra microcode ROM and PLA
capacity.