21 Feb
2012
21 Feb
'12
3:43 a.m.
On 02/20/2012 09:48 PM, Toby Thain wrote:
...
Then it dawned on me: I had 144 very simple cores that are VERY cheap,
less than fourteen cents apiece at the single-unit quantity price:
implement a bit-banged SPI controller in one of those cores! ...
In this case, it's not all about distributing "processes" across
multiple processors, but "functionality", where some of those
functionalities might be implemented in purpose-built, rather than
general-purpose hardware on more traditional microcontroller designs.
That sounds like the Transputer model -- there was quite a diversity of
devices accessible via the standard serial links: I/O, storage,
graphics, networks, etc.
Well sorta, but in that model you'd bit-bang all of that stuff with
(mostly) identical Transputers. That would never have been
cost-effective back in those days. The cores in the GA144 (and related
chips) are SUPER simple (Chuck Moore's specialty) and as such are very
cheap. The 144-core die is tiny!
-Dave
--
Dave McGuire, AK4HZ
New Kensington, PA
Nobody is
putting x86_64s on tiny boards embedded in vending machines
talking to GSM modems. (something I'm in the process of doing right
now!)
OK, but why do your GSM modems need to be talking to 2+ interlinked
cores rather than one core that is 2+ times as fast? What are you doing
with them that makes controllling them with a single fast core
impractical?