DEC qbus Q/CD

On Oct 28 2004, 23:46, meltie lists wrote: backplane? Q18-serpentine QBus backplanes are normally soldered, with short pins, not wirewrap. I don't know if that's true for H9270, though (which I assume is what you have). There's a diagram with the info you need for Qbus in most QBus processor handbooks, in the chapter on the bus. The CD interconnect is described in the chapters on backplanes in the Microcomputer Interfaces handbook. If that won't do, most of the info is on my QBusConns.ps diagram at http://www.dunnington.u-net.com/public/PDP-11/ . In essence, almost all the signals on A and B are bussed all the way down, pin for pin, except the following: SSPARE[1238]: AE1, AF1, AH1, BH1 are normally not bussed MSPARE[AB]: AK1 is connected to AL1 at each slot, but not bussed; ditto BK1+BL1 SSPARE[4567]: BDAL18-21 on Q22, are bussed on Q22 backplanes PSPARE[12]: AU1 and BU1 need not be bussed - nothing should use them BIAK[IO]: BIAKI (AM2) on each slot is connected only to BIAKO (AN2) on the slot below BDMG[IO]: BDMGO (AS2) on each slot is connected only to BDMGI (AR) on the slot below (I'm not absolutely certain about the last, but I'm fairly sure that's right.) On C and D, pretty much everything on C2 and D2 of each slot is connected to the corresponding pin on C1 and D1 of the slot below, except: CA1 on each slot connects to CC1 on the next slot down CT2 on each slot connects to DT2 on the next slot down CA2 and DA2 are bussed to +5V CC2, CD2, CT1, and DT1 are all ground On the top slot only, there's a jumper between CK1 and CL1, and another between DK1 and DL1. -- Pete Peter Turnbull Network Manager University of York