Ah, another myth to bust. Intel did not come up with hyperthreading. It was developed by
researchers at the University of Washington in collaboration with DEC, and would have
shipped in the 21464. (I took Computer Architecture from one of those researchers.) It
attempts to take advantage of thread-level parallelism, as instruction-level parallelism
(leveraged by superscalar architectures) still leaves a fair amount of 'dawdle
time' for the chip's functional units. Modern multilevel memory architectures are
pretty good at keeping processors fed -- Ian
________________________________________
From: cctalk-bounces at
classiccmp.org [cctalk-bounces at
classiccmp.org] On Behalf Of
Dave McGuire [mcguire at
neurotica.com]
Sent: Monday, May 10, 2010 5:52 PM
To: On-Topic and Off-Topic Posts
Subject: Re: Greatest videogame device (was Re: An option - Re: thebeginningof
On 5/10/10 7:36 PM, Eric Smith wrote:
On 05/10/2010 11:43 AM, Tony Duell wrote:
So I ask again. What clock signal is this 2GHz
refering to?
The x86 processors from Intel and AMD contain an internal PLL which
multiplies the external clock to produce an internal clock for the
processor pipeline. Most of the CPU core is running on that core clock.
(In the case of the Pentium 4 and derived processors, some of it
actually operates at twice the core clock.) Instructions take a variable
number of cycles to execute, but there are multiple instructions "in
flight" at any given time. The average number of instructions executed
per clock cycle is greater than one.
Sometimes! Also, don't forget that most (all?) x86 processors spend
the majority of their wall-clock time waiting for memory. I'd be
surprised if it were anywhere near one, much less greater than one, for
anything other than very short bursts. In fact, Intel themselves
realized this when they came up with the HT scheme. (then took a
generation or two to get it right in the face of the replay mechanism)
-Dave
--
Dave McGuire
Port Charlotte, FL