1 Mar
2008
1 Mar
'08
7:27 a.m.
From: cclist at sydex.com
On 29 Feb 2008 at 20:13, Andrew Lynch wrote:
Hi
It would lack the on board compiler but I know of a company
that sells an embilical Forth where the Forth runs on a Harvard
machine and a PC is use to do the interactive part. It just
uses the boot load to update the code in the chip.
From the user, the PC end looks like it is the chip and the
chip has just the needed code and no wasted space that isn't
the final application.
Dwight
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While working on this rather simple project, it
kept occurring to me that
the PIC is practicaly begging to be made into a general purpose low chip
count computer. Add some address and data bus latches, static memory, an
EPROM, maybe a peripheral or two. The parallel and serial ports are
practically built in already. Yes, the PIC doesn't have your traditional
data and address bus but with a small 40 pin PIC protoboard like this, it
doesn't seem like it'd be all that hard to interface one to a small SRAM
like a 6264.
Andrew and I have discussed this one. My idea would be to take a PIC
or AVR and implement something like a P-code machine in the firmware.
Fetch the instruction and data stream from the 6264. That way,
there's no problem with the Harvard architecture uC running all
instructions out of PROM.
You could also construct a FORTH machine the same way, I suspect.