I have been pondering the complexities of implementing a PDP-11 class
processor (KDJ11, because I have a manual) in an FPGA for a few months
now, and have a few rhetorical questions to pose:
How many gates is a single chip processor going to use? And how
expensive is an FPGA that size. Or are large PALs a better choice
(free tools for AMD/Vantis MACH series, and Altera's entry level
parts)
What to use for a system. If I use a QBus based system (I have
several available) what are the timing requirements? Is there
a doc for this? Or Unibus? Or (my current favorite) Socket-7...
What architecture? Microcoded or gates? Microcode requires an
assembler, but might be quicker in the long run.
And when its all done, what is it really good for? How many
"hardware hackers" are interested in building CPU boards, and
are willing to share the cost of laying out and manufacturing
PCBs?
I will probably make a stab at it, but depending on life, might not
ever finish...
clint
On Thu, 26 Aug 1999, Chuck McManis wrote:
As was pointed out on the NetBSD list, Compaq has
officially End-of-lifed
(EOLd) the VAX architecture. This follows a trend of having EOLs the -8,
-10, -11, and now VAX series.
I suggested to some folks, off list, that perhaps DEC should make the
PDP-11 architecture "open source" in the sense of allowing anyone to
produce PDP-11 capable processors but was told that Mentec has purchased
the rights to the PDP-11 architecture from DEC. What's up with that? True?
False? Kind-a true? (I know Mentec sells PDP-11 compatible computers)
Given the complexity of the 11/70 CPU it should be possible to put the
entire thing inside a relatively inexpensive FPGA these days. Given
something like NetBSD that is already multi-architecture aware, that would
make it possible to have an open source OS running on it. We could
potentially get to a system that was completely "open hardware." (ie anyone
could build one with no royalty requirements, and hackers could build them
for fun.)
--Chuck