14 Dec
2008
14 Dec
'08
3:33 a.m.
bfranchuk at jetnet.ab.ca wrote:
Sridhar Ayengar wrote:
Not necessarily. That's one possible advantage of a RISC design, but it
isn't necessary in order to be a RISC.
Peace... Sridhar
John Floren wrote:
How do you have RISC from a CPLD since RISC implies a large register stack?
After doing some looking I thought I'd go
with 68020 if I were to do
32-bit, or 68000 for 16-bit. I may take Tony's excellent advice and
try something even simpler first, if I can get my hands on the Art of
Electronics books... they're on Amazon, I'll probably just have to
buckle down and shell out the money.
My vote is for processor-from-scratch. Designing and building a
simple RISC architecture into a CPLD is still one of the most fun
exercises I've ever undertaken.
BTW, my machine runs FORTH. Most of the FORTH environment consists
of, as has been suggested as a good method, off-the-shelf FORTH
primitives written in FORTH.
Peace... Sridhar