It will require no modification at all to handle those formats. It samples
the data at a harmonic of the data rate and writes it back at a harmonic
suitable for adjustment for write precompensation. Dealing with the
different modulations, as you've named, is a software post-processing task.
Likewise, if a little extra effort is put into the design, it can record,
quantitatively the location of the index/sector pulses in order to enable
reading and writing of hard-sectored diskettes. There are too many
mechanical variations to allow simple timing of the theoretical locations of
these events.
The notion of reprogramming the thing is perhaps a pregnant one, but I have
reservations about the suitability of this particular device, for want of
pins. A single or pair of 256Kx4 DRAMs might be manageable, but SRAMS would
require 30 connections and the EPP/SPP interface would require 13. Then
there are a few connections to the drive cable required. As you can see,
we're past being out of pins already. A 68-pin device would be more likely
to work. Perhaps a video DRAM would work with fewer connections.
Dick
----- Original Message -----
From: Eric J. Korpela <korpela(a)ellie.ssl.berkeley.edu>
To: <classiccmp(a)classiccmp.org>
Sent: Wednesday, July 05, 2000 11:50 AM
Subject: Re: Tim's own version of the Catweasel/Compaticard/whatever
>
The
circuit
> wouldn't be modifiable on the fly, however,
unless you consider the
multiple
minutes of
reprogramming time and the associated physical effort "on the
fly."
I do consider that to be on the fly.
> So far, I've seen no reason to make this baby reconfigurable. What do
you
have in mind?
FM, MFM, or GCR decom in the CPLD.
Eric