20 Oct
2010
20 Oct
'10
4:11 a.m.
On 10/19/2010 12:05 AM, Vincent Slyngstad wrote:
Yes, I was aware of your work. Yours is up and running, where mine is
a ways away,
yet :-).
but your approach is aesthetically pleasing. I like it a lot.
But I wonder how much of the 8/I design depends on gate delays. From my
read of the schematics,
which I admit has been only cursory, there seemed to be a lot of "pulse
logic", which I worry about
in an FPGA. You should be able to simulate it, but it may be
interesting to see how that synthesizes.
*
*Still, worth doing, with a very cool result.
I think I might have an RF08 VPI model if you want one. It's simple but
it might give you a leg up.
(I still like the idea of a big PCB with lots of TTL which functions an
8/I. I'd buy one :-)
-brad