Hi
I've written up a preliminary schematic for the ZIDE circuit. It is similar
to the XT-IDE V2 in most ways but with a few differences.
The ROM has changed from a 8KB-32KB EPROM/EEPROM to a 2KB EPROM/EEPROM.
This is because the address space of a Z80 is much smaller than the 8088 and
generally you don't need large ROMs. 2KB of optional read/write EEPROM or
read only EPROM should be sufficient.
The ISA bus signals are slightly different than the Z80 so I did a little
conversion of signals. For instance, the ISA RESET and IRQ signals are all
active-high where on the Z80 they are active low. Also the ISA
MEMR*/MEMW*/IOW*/IOR* have to be converted to Z80 MREQ*/IORQ*/RD*/WR*
The interrupts on Z80 are simpler too. However since the Z80 will be in
shim socket I am thinking the RESET* and INT* signals will have to come from
open collector gates to accommodate whatever the host machine is already
doing on those signals.
If anyone wants to take a look at the schematic please contact me offline.
However, I am keeping the 16 bit IDE interface regardless. It makes no
sense to me to restrict compatibility of the ZIDE to small percentage of
IDE/CF devices and effectively lock out so many still useful IDE drives.
Thanks and have a nice day!
Andrew Lynch