17 Oct
2005
17 Oct
'05
9:07 a.m.
Mark Tapley wrote:
At 18:08 -0500 10/14/05, cctalk-request at
classiccmp.org wrote:
Also depends on how inviolate the code must be, and how verifiable the
system. If you need to re-create the system, FORTH can be implemented
with a lot fewer gates of hardware and a lot fewer lines of code than
JAVA - and would therefore be a lot easier to verify, if you need to
design/build new hardware to run your legacy code on in 25 years.
Are we tallking real gates as in TTL, or FPGA style design? Forth does
have several advantages
over say fortran since they removed the Sense Switch requirment of
fortran.My worry is that you
may not be able to high-level threshold logic and memory anymore for
industral problems.
Suppose
you wanted to write an application for a manufacturing
process that
>will, in all probability, run for the next 30 years....